From: YannickV <y.vos...@beckhoff.com>
The Beckhoff CX7200 is based on the Xilinx Zynq-7000 SoC.
It integrates the Beckhoff Communication Controller (CCAT),
which is implemented as an FPGA within the Zynq's programmable
logic (PL).
This commit adds the CCAT as an MMIO device to the CX7200
machine in QEMU, enabling its emulation and interaction with
the system.
Signed-off-by: Yannick Voßen <y.vos...@beckhoff.com>
---
hw/arm/Kconfig | 1 +
hw/arm/beckhoff_CX7200.c | 13 +++++++++++++
2 files changed, 14 insertions(+)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index a8648b9edf..782da4c22a 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -327,6 +327,7 @@ config BECK_CX7200
select XILINX_SPI
select XILINX_SPIPS
select ZYNQ_DEVCFG
+ select BECKHOFF_CCAT
config ARM_V7M
bool
diff --git a/hw/arm/beckhoff_CX7200.c b/hw/arm/beckhoff_CX7200.c
index 0f99cbf554..0fe03f570f 100644
--- a/hw/arm/beckhoff_CX7200.c
+++ b/hw/arm/beckhoff_CX7200.c
@@ -130,6 +130,17 @@ static void gem_init(uint32_t base, qemu_irq irq)
sysbus_connect_irq(s, 0, irq);
}
+static void ccat_init(uint32_t base)
+{
+ DeviceState *dev;
+ SysBusDevice *busdev;
+
+ dev = qdev_new("beckhoff-ccat");
+ busdev = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(busdev, &error_fatal);
+ sysbus_mmio_map(busdev, 0, base);
+}
+
static inline int beckhoff_cx7200_init_spi_flashes(uint32_t base_addr,
qemu_irq irq, bool is_qspi, int unit0)
{
@@ -313,6 +324,8 @@ static void beckhoff_cx7200_init(MachineState *machine)
gem_init(0xE000C000, pic[77 - IRQ_OFFSET]);
+ ccat_init(0x40000000);
+
/*
* Compatible with:
* - SD Host Controller Specification Version 2.0 Part A2
--
2.49.0
