[PATCH-for-10.1 3/4] target/sparc: Log unimplemented ASI load/store accesses

[Philippe Mathieu-Daudé]

When the cache-controller feature is not implemented,
log potential ASI access as unimplemented.

Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
---
 target/sparc/ldst_helper.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c
index b559afc9a94..d4de32d3c48 100644
--- a/target/sparc/ldst_helper.c
+++ b/target/sparc/ldst_helper.c
@@ -600,6 +600,10 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong 
addr,
         case 0x0C:          /* Leon3 Date Cache config */
             if (env->def.features & CPU_FEATURE_CACHE_CTRL) {
                 ret = leon3_cache_control_ld(env, addr, size);
+            } else {
+                qemu_log_mask(LOG_UNIMP,
+                              "%08x: unimplemented access size: %d\n", addr,
+                              size);
             }
             break;
         case 0x01c00a00: /* MXCC control register */
@@ -816,6 +820,10 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, 
uint64_t val,
         case 0x0C:          /* Leon3 Date Cache config */
             if (env->def.features & CPU_FEATURE_CACHE_CTRL) {
                 leon3_cache_control_st(env, addr, val, size);
+            } else {
+                qemu_log_mask(LOG_UNIMP,
+                              "%08x: unimplemented access size: %d\n", addr,
+                              size);
             }
             break;
 
-- 
2.47.1