On Thu, Mar 20 2025, Sebastian Ott <seb...@redhat.com> wrote:
> On Tue, 11 Mar 2025, Cornelia Huck wrote:
>> +++ b/target/arm/cpu.h
> [...]
>> +/* REG is ID_XXX */
>> +#define FIELD_DP64_IDREG(ISAR, REG, FIELD, VALUE) \
>> + ({ \
>> + ARMISARegisters *i_ = (ISAR); \
>> + uint64_t regval = i_->idregs[REG ## _EL1_IDX]; \
>
> This won't work for regs that don't fit this naming scheme. Up to this
> point in the series that's only CTR_EL0, later with the auto generation it
> will be more. But I guess this can be extended when/if there's an actual
> need..
All ID_XXX registers fit the "has an _EL1 suffix" scheme, though, and
these are what we use the _IDREG() accessors for (we use FIELD_DP64 for
CTR_EL0 fields.) (At least, that matches what I see called "ID
registers" in the Arm Arm.)
The sysregs we get via
KVM_ARM_GET_REG_WRITABLE_MASKS/KVM_ARM_FEATURE_ID_RANGE
contain ID_XXX registers, and some more writable registers in the
feature id range which are not really id registers (but which we want to
handle via the command line as well). I think all the non _EL1 registers
we want to handle fall into the latter category (i.e. we're not going to
use the _IDREG() accessors for them?)
