Re: [PATCH v1 20/22] test/qtest/hace: Support to test upper 32 bits of digest and source addresses

[Cédric Le Goater]

On 3/21/25 10:26, Jamin Lin wrote:

Added "src_hi" and "dest_hi" fields to "AspeedMasks" for 64-bit addresses test.
Updated "aspeed_test_addresses" to validate "HACE_HASH_SRC_HI" and
"HACE_HASH_DIGEST_HI".
Ensured correct masking of 64-bit addresses by checking both lower and upper
32-bit registers.

Signed-off-by: Jamin Lin <jamin_...@aspeedtech.com>

Reviewed-by: Cédric Le Goater <c...@redhat.com>

Thanks,

C.

---
  tests/qtest/aspeed-hace-utils.h |  2 ++
  tests/qtest/aspeed-hace-utils.c | 15 ++++++++++++++-
  2 files changed, 16 insertions(+), 1 deletion(-)

diff --git a/tests/qtest/aspeed-hace-utils.h b/tests/qtest/aspeed-hace-utils.h
index d8684d3f83..de8055a1db 100644
--- a/tests/qtest/aspeed-hace-utils.h
+++ b/tests/qtest/aspeed-hace-utils.h
@@ -51,6 +51,8 @@ struct AspeedMasks {
      uint32_t src;
      uint32_t dest;
      uint32_t len;
+    uint32_t src_hi;
+    uint32_t dest_hi;
  };

void aspeed_test_md5(const char *machine, const uint32_t base,

diff --git a/tests/qtest/aspeed-hace-utils.c b/tests/qtest/aspeed-hace-utils.c
index 8d9c464f72..fc209353f3 100644
--- a/tests/qtest/aspeed-hace-utils.c
+++ b/tests/qtest/aspeed-hace-utils.c
@@ -588,30 +588,43 @@ void aspeed_test_addresses(const char *machine, const 
uint32_t base,
       */
      g_assert_cmphex(qtest_readl(s, base + HACE_CMD), ==, 0);
      g_assert_cmphex(qtest_readl(s, base + HACE_HASH_SRC), ==, 0);
+    g_assert_cmphex(qtest_readl(s, base + HACE_HASH_SRC_HI), ==, 0);
      g_assert_cmphex(qtest_readl(s, base + HACE_HASH_DIGEST), ==, 0);
+    g_assert_cmphex(qtest_readl(s, base + HACE_HASH_DIGEST_HI), ==, 0);
      g_assert_cmphex(qtest_readl(s, base + HACE_HASH_DATA_LEN), ==, 0);

-

      /* Check that the address masking is correct */
      qtest_writel(s, base + HACE_HASH_SRC, 0xffffffff);
      g_assert_cmphex(qtest_readl(s, base + HACE_HASH_SRC), ==, expected->src);

+ qtest_writel(s, base + HACE_HASH_SRC_HI, 0xffffffff);

+    g_assert_cmphex(qtest_readl(s, base + HACE_HASH_SRC_HI),
+                    ==, expected->src_hi);
+
      qtest_writel(s, base + HACE_HASH_DIGEST, 0xffffffff);
      g_assert_cmphex(qtest_readl(s, base + HACE_HASH_DIGEST), ==,
                      expected->dest);

+ qtest_writel(s, base + HACE_HASH_DIGEST_HI, 0xffffffff);

+    g_assert_cmphex(qtest_readl(s, base + HACE_HASH_DIGEST_HI), ==,
+                    expected->dest_hi);
+
      qtest_writel(s, base + HACE_HASH_DATA_LEN, 0xffffffff);
      g_assert_cmphex(qtest_readl(s, base + HACE_HASH_DATA_LEN), ==,
                      expected->len);

/* Reset to zero */

      qtest_writel(s, base + HACE_HASH_SRC, 0);
+    qtest_writel(s, base + HACE_HASH_SRC_HI, 0);
      qtest_writel(s, base + HACE_HASH_DIGEST, 0);
+    qtest_writel(s, base + HACE_HASH_DIGEST_HI, 0);
      qtest_writel(s, base + HACE_HASH_DATA_LEN, 0);

/* Check that all bits are now zero */

      g_assert_cmphex(qtest_readl(s, base + HACE_HASH_SRC), ==, 0);
+    g_assert_cmphex(qtest_readl(s, base + HACE_HASH_SRC_HI), ==, 0);
      g_assert_cmphex(qtest_readl(s, base + HACE_HASH_DIGEST), ==, 0);
+    g_assert_cmphex(qtest_readl(s, base + HACE_HASH_DIGEST_HI), ==, 0);
      g_assert_cmphex(qtest_readl(s, base + HACE_HASH_DATA_LEN), ==, 0);

qtest_quit(s);