On 15/4/25 21:25, Richard Henderson wrote:
The i386 backend can now check TCGOP_FLAGS to select
the correct set of constraints.

Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
---
  include/tcg/tcg-opc.h            | 4 ----
  tcg/aarch64/tcg-target-has.h     | 1 -
  tcg/arm/tcg-target-has.h         | 1 -
  tcg/i386/tcg-target-con-str.h    | 2 +-
  tcg/i386/tcg-target-has.h        | 3 ---
  tcg/loongarch64/tcg-target-has.h | 3 ---
  tcg/mips/tcg-target-has.h        | 1 -
  tcg/ppc/tcg-target-has.h         | 2 --
  tcg/riscv/tcg-target-has.h       | 1 -
  tcg/s390x/tcg-target-has.h       | 1 -
  tcg/sparc64/tcg-target-has.h     | 1 -
  tcg/tci/tcg-target-has.h         | 2 --
  tcg/optimize.c                   | 1 -
  tcg/tcg-op-ldst.c                | 9 ++-------
  tcg/tcg.c                        | 4 ----
  docs/devel/tcg-ops.rst           | 6 ------
  tcg/i386/tcg-target.c.inc        | 9 ++++-----
  17 files changed, 7 insertions(+), 44 deletions(-)


diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc
index 52285bcd54..40e640ff89 100644
--- a/tcg/i386/tcg-target.c.inc
+++ b/tcg/i386/tcg-target.c.inc
@@ -2457,7 +2457,7 @@ static void tcg_out_qemu_st_direct(TCGContext *s, TCGReg 
datalo, TCGReg datahi,
switch (memop & MO_SIZE) {
      case MO_8:
-        /* This is handled with constraints on INDEX_op_qemu_st8_i32. */
+        /* This is handled with constraints on INDEX_op_qemu_st_*_i32. */

"... handled with constraints on INDEX_op_qemu_st_i32."

Either INDEX_op_qemu_st_i32 or INDEX_op_qemu_st_*.

          tcg_debug_assert(TCG_TARGET_REG_BITS == 64 || datalo < 4);
          tcg_out_modrm_sib_offset(s, OPC_MOVB_EvGv + P_REXB_R + h.seg,
                                   datalo, h.base, h.index, 0, h.ofs);
@@ -3568,7 +3568,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, 
TCGType type,
          break;
case INDEX_op_qemu_st_i32:
-    case INDEX_op_qemu_st8_i32:
          tcg_out_qemu_st(s, a0, -1, a1, a2, TCG_TYPE_I32);
          break;
      case INDEX_op_qemu_st_i64:
@@ -4140,9 +4139,9 @@ tcg_target_op_def(TCGOpcode op, TCGType type, unsigned 
flags)
          return C_O1_I1(r, L);
case INDEX_op_qemu_st_i32:
-        return C_O0_I2(L, L);
-    case INDEX_op_qemu_st8_i32:
-        return C_O0_I2(s, L);
+        return (TCG_TARGET_REG_BITS == 32 && flags == MO_8

)

+                ? C_O0_I2(s, L)
+                : C_O0_I2(L, L));

(misplaced parenthesis)

Nice!

Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>


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