While we model a 16-elements RX FIFO since the PL011 model was introduced in commit cdbdb648b7c ("ARM Versatile Platform Baseboard emulation"), we only read 1 char at a time!
Have can_receive() return how many elements are available, and use that in receive(). This is the Rust version of commit 3e0f118f825 ("hw/char/pl011: Really use RX FIFO depth"); but it also adds back a comment that is present in commit f576e0733cc ("hw/char/pl011: Add support for loopback") and absent in the Rust code. Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org> Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> --- docs/devel/rust.rst | 2 +- rust/hw/char/pl011/src/device.rs | 19 +++++++++++++------ 2 files changed, 14 insertions(+), 7 deletions(-) diff --git a/docs/devel/rust.rst b/docs/devel/rust.rst index 4de86375021..171d908e0b0 100644 --- a/docs/devel/rust.rst +++ b/docs/devel/rust.rst @@ -119,7 +119,7 @@ QEMU includes four crates: for the ``hw/char/pl011.c`` and ``hw/timer/hpet.c`` files. .. [#issues] The ``pl011`` crate is synchronized with ``hw/char/pl011.c`` - as of commit 02b1f7f61928. The ``hpet`` crate is synchronized as of + as of commit 3e0f118f82. The ``hpet`` crate is synchronized as of commit 1433e38cc8. Both are lacking tracing functionality. This section explains how to work with them. diff --git a/rust/hw/char/pl011/src/device.rs b/rust/hw/char/pl011/src/device.rs index 94b31659849..bde3be65c5b 100644 --- a/rust/hw/char/pl011/src/device.rs +++ b/rust/hw/char/pl011/src/device.rs @@ -580,19 +580,26 @@ fn write(&self, offset: hwaddr, value: u64, _size: u32) { fn can_receive(&self) -> u32 { let regs = self.regs.borrow(); // trace_pl011_can_receive(s->lcr, s->read_count, r); - u32::from(regs.read_count < regs.fifo_depth()) + regs.fifo_depth() - regs.read_count } fn receive(&self, buf: &[u8]) { - if buf.is_empty() { + let mut regs = self.regs.borrow_mut(); + if regs.loopback_enabled() { + // In loopback mode, the RX input signal is internally disconnected + // from the entire receiving logics; thus, all inputs are ignored, + // and BREAK detection on RX input signal is also not performed. return; } - let mut regs = self.regs.borrow_mut(); - let c: u32 = buf[0].into(); - let update_irq = !regs.loopback_enabled() && regs.fifo_rx_put(c.into()); + + let mut update_irq = false; + for &c in buf { + let c: u32 = c.into(); + update_irq |= regs.fifo_rx_put(c.into()); + } + // Release the BqlRefCell before calling self.update() drop(regs); - if update_irq { self.update(); } -- 2.49.0