From: "hemanshu.khilari.foss" <hemanshu.khilari.f...@gmail.com>
The links to riscv iommu specification document are incorrect. This patch updates all the said link to point to correct location. Cc: qemu-sta...@nongnu.org Cc: qemu-ri...@nongnu.org Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2808 Signed-off-by: hemanshu.khilari.foss <hemanshu.khilari.f...@gmail.com> Reviewed-by: Alistair Francis <alistair.fran...@wdc.com> Message-ID: <20250323063404.13206-1-hemanshu.khilari.f...@gmail.com> Signed-off-by: Alistair Francis <alistair.fran...@wdc.com> (cherry picked from commit e768f0246ce2625880800a2bdce78438b5e9282c) Signed-off-by: Michael Tokarev <m...@tls.msk.ru> diff --git a/docs/specs/riscv-iommu.rst b/docs/specs/riscv-iommu.rst index 463f4cffb6..decd81cf4f 100644 --- a/docs/specs/riscv-iommu.rst +++ b/docs/specs/riscv-iommu.rst @@ -4,7 +4,7 @@ RISC-V IOMMU support for RISC-V machines ======================================== QEMU implements a RISC-V IOMMU emulation based on the RISC-V IOMMU spec -version 1.0 `iommu1.0`_. +version 1.0 `iommu1.0.0`_. The emulation includes a PCI reference device, riscv-iommu-pci, that QEMU RISC-V boards can use. The 'virt' RISC-V machine is compatible with this @@ -14,7 +14,7 @@ riscv-iommu-pci reference device -------------------------------- This device implements the RISC-V IOMMU emulation as recommended by the section -"Integrating an IOMMU as a PCIe device" of `iommu1.0`_: a PCI device with base +"Integrating an IOMMU as a PCIe device" of `iommu1.0.0`_: a PCI device with base class 08h, sub-class 06h and programming interface 00h. As a reference device it doesn't implement anything outside of the specification, @@ -83,7 +83,7 @@ Several options are available to control the capabilities of the device, namely: - "s-stage": enable s-stage support - "g-stage": enable g-stage support -.. _iommu1.0: https://github.com/riscv-non-isa/riscv-iommu/releases/download/v1.0/riscv-iommu.pdf +.. _iommu1.0.0: https://github.com/riscv-non-isa/riscv-iommu/releases/download/v1.0.0/riscv-iommu.pdf .. _linux-v8: https://lore.kernel.org/linux-riscv/cover.1718388908.git.tjezn...@rivosinc.com/ -- 2.39.5
