Reviewed-by: Glenn Miles <mil...@linux.ibm.com>
On Mon, 2025-05-12 at 13:10 +1000, Nicholas Piggin wrote:
> From: Michael Kowal <ko...@linux.ibm.com>
>
> When the END Event Queue wraps the END EQ Generation bit is flipped and the
> Generation Flipped bit is set to one. On a END cache Watch read operation,
> the Generation Flipped bit needs to be reset.
>
> While debugging an error modified END not valid error messages to include
> the method since all were the same.
>
> Signed-off-by: Michael Kowal <ko...@linux.ibm.com>
> ---
> hw/intc/pnv_xive2.c | 3 ++-
> hw/intc/xive2.c | 4 ++--
> 2 files changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c
> index 30b4ab2efe..72cdf0f20c 100644
> --- a/hw/intc/pnv_xive2.c
> +++ b/hw/intc/pnv_xive2.c
> @@ -1325,10 +1325,11 @@ static uint64_t pnv_xive2_ic_vc_read(void *opaque,
> hwaddr offset,
> case VC_ENDC_WATCH3_DATA0:
> /*
> * Load DATA registers from cache with data requested by the
> - * SPEC register
> + * SPEC register. Clear gen_flipped bit in word 1.
> */
> watch_engine = (offset - VC_ENDC_WATCH0_DATA0) >> 6;
> pnv_xive2_end_cache_load(xive, watch_engine);
> + xive->vc_regs[reg] &= ~(uint64_t)END2_W1_GEN_FLIPPED;
> val = xive->vc_regs[reg];
> break;
>
> diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c
> index 4dd04a0398..453fe37f18 100644
> --- a/hw/intc/xive2.c
> +++ b/hw/intc/xive2.c
> @@ -374,8 +374,8 @@ static void xive2_end_enqueue(Xive2End *end, uint32_t
> data)
> qgen ^= 1;
> end->w1 = xive_set_field32(END2_W1_GENERATION, end->w1, qgen);
>
> - /* TODO(PowerNV): reset GF bit on a cache watch operation */
> - end->w1 = xive_set_field32(END2_W1_GEN_FLIPPED, end->w1, qgen);
> + /* Set gen flipped to 1, it gets reset on a cache watch operation */
> + end->w1 = xive_set_field32(END2_W1_GEN_FLIPPED, end->w1, 1);
> }
> end->w1 = xive_set_field32(END2_W1_PAGE_OFF, end->w1, qindex);
> }
