This commit enables to Wasm backend to run as a 64bit backend with removing
TCG_TARGET_REG_BITS = 32 macros.
Signed-off-by: Kohei Tokunaga <ktokunaga.m...@gmail.com>
---
tcg/wasm32.c | 5 ++-
tcg/wasm32/tcg-target-reg-bits.h | 8 +---
tcg/wasm32/tcg-target.c.inc | 69 +++-----------------------------
3 files changed, 9 insertions(+), 73 deletions(-)
diff --git a/tcg/wasm32.c b/tcg/wasm32.c
index 4bc53d76d0..b238ccf6d6 100644
--- a/tcg/wasm32.c
+++ b/tcg/wasm32.c
@@ -370,8 +370,9 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState
*env,
unsigned i, s, n;
tci_args_nl(insn, tb_ptr, &len, &ptr);
- func = ((void **)ptr)[0];
- cif = ((void **)ptr)[1];
+ tcg_target_ulong *data = (tcg_target_ulong *)ptr;
+ func = (void *)data[0];
+ cif = (void *)data[1];
n = cif->nargs;
for (i = s = 0; i < n; ++i) {
diff --git a/tcg/wasm32/tcg-target-reg-bits.h b/tcg/wasm32/tcg-target-reg-bits.h
index dcb1a203f8..375feccf91 100644
--- a/tcg/wasm32/tcg-target-reg-bits.h
+++ b/tcg/wasm32/tcg-target-reg-bits.h
@@ -7,12 +7,6 @@
#ifndef TCG_TARGET_REG_BITS_H
#define TCG_TARGET_REG_BITS_H
-#if UINTPTR_MAX == UINT32_MAX
-# define TCG_TARGET_REG_BITS 32
-#elif UINTPTR_MAX == UINT64_MAX
-# define TCG_TARGET_REG_BITS 64
-#else
-# error Unknown pointer size for tci target
-#endif
+#define TCG_TARGET_REG_BITS 64
#endif
diff --git a/tcg/wasm32/tcg-target.c.inc b/tcg/wasm32/tcg-target.c.inc
index ea9131e6fe..9fad96d0fd 100644
--- a/tcg/wasm32/tcg-target.c.inc
+++ b/tcg/wasm32/tcg-target.c.inc
@@ -30,15 +30,9 @@
/* Used for function call generation. */
#define TCG_TARGET_CALL_STACK_OFFSET 0
#define TCG_TARGET_STACK_ALIGN 8
-#if TCG_TARGET_REG_BITS == 32
-# define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_EVEN
-# define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_EVEN
-# define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_EVEN
-#else
-# define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_NORMAL
-# define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL
-# define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_NORMAL
-#endif
+#define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_NORMAL
+#define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL
+#define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_NORMAL
#define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_NORMAL
typedef uint32_t tcg_insn_unit_tci;
@@ -3083,39 +3077,6 @@ static const TCGOutOpMovcond outop_movcond = {
.out = tgen_movcond,
};
-static void tgen_brcond2(TCGContext *s, TCGCond cond, TCGReg al, TCGReg ah,
- TCGArg bl, bool const_bl,
- TCGArg bh, bool const_bh, TCGLabel *l)
-{
- tcg_out_op_rrrrrc(s, INDEX_op_setcond2_i32, TCG_REG_TMP,
- al, ah, bl, bh, cond);
- tcg_out_op_rl(s, INDEX_op_brcond, TCG_REG_TMP, l);
-}
-
-#if TCG_TARGET_REG_BITS != 32
-__attribute__((unused))
-#endif
-static const TCGOutOpBrcond2 outop_brcond2 = {
- .base.static_constraint = C_O0_I4(r, r, r, r),
- .out = tgen_brcond2,
-};
-
-static void tgen_setcond2(TCGContext *s, TCGCond cond, TCGReg ret,
- TCGReg al, TCGReg ah,
- TCGArg bl, bool const_bl,
- TCGArg bh, bool const_bh)
-{
- tcg_out_op_rrrrrc(s, INDEX_op_setcond2_i32, ret, al, ah, bl, bh, cond);
-}
-
-#if TCG_TARGET_REG_BITS != 32
-__attribute__((unused))
-#endif
-static const TCGOutOpSetcond2 outop_setcond2 = {
- .base.static_constraint = C_O1_I4(r, r, r, r, r),
- .out = tgen_setcond2,
-};
-
static void tcg_out_mb(TCGContext *s, unsigned a0)
{
tcg_out_op_v(s, INDEX_op_mb);
@@ -3242,18 +3203,8 @@ static const TCGOutOpQemuLdSt outop_qemu_ld = {
.out = tgen_qemu_ld,
};
-static void tgen_qemu_ld2(TCGContext *s, TCGType type, TCGReg datalo,
- TCGReg datahi, TCGReg addr, MemOpIdx oi)
-{
- tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_TMP, oi);
- tcg_out_op_rrrr(s, INDEX_op_qemu_ld2, datalo, datahi, addr, TCG_REG_TMP);
-}
-
static const TCGOutOpQemuLdSt2 outop_qemu_ld2 = {
- .base.static_constraint =
- TCG_TARGET_REG_BITS == 64 ? C_NotImplemented : C_O2_I1(r, r, r),
- .out =
- TCG_TARGET_REG_BITS == 64 ? NULL : tgen_qemu_ld2,
+ .base.static_constraint = C_NotImplemented,
};
static void tgen_qemu_st(TCGContext *s, TCGType type, TCGReg data,
@@ -3268,18 +3219,8 @@ static const TCGOutOpQemuLdSt outop_qemu_st = {
.out = tgen_qemu_st,
};
-static void tgen_qemu_st2(TCGContext *s, TCGType type, TCGReg datalo,
- TCGReg datahi, TCGReg addr, MemOpIdx oi)
-{
- tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_TMP, oi);
- tcg_out_op_rrrr(s, INDEX_op_qemu_st2, datalo, datahi, addr, TCG_REG_TMP);
-}
-
static const TCGOutOpQemuLdSt2 outop_qemu_st2 = {
- .base.static_constraint =
- TCG_TARGET_REG_BITS == 64 ? C_NotImplemented : C_O0_I3(r, r, r),
- .out =
- TCG_TARGET_REG_BITS == 64 ? NULL : tgen_qemu_st2,
+ .base.static_constraint = C_NotImplemented,
};
static void tcg_out_st(TCGContext *s, TCGType type, TCGReg val, TCGReg base,
--
2.43.0
