Hi,
Zhi-zhou Zhang a écrit :
I found that when qemu-system-mips64el executed 'movz' with -M mips,
it would raise a reserved instruction exception.
The mips spec describes movz as below:
Mnemonic Instructio Defined in MIPS ISA
MOVZ Move Conditional on Zero MIPS32
I think ISA-64 should support MIPS32 instructions for compatible. am I
right?
movz instruction is available on MIPS4 and MIPS32 instruction sets (+
Loongson2E/2F CPUs)
However, by default, 'mips' machine on qemu-system-mips64el uses a R4000
CPU, which is only MIPS3 compatible.
You need to use another cpu which is MIPS4 or MIPS32 compatible with the
-cpu option.
Regards,
Hervé
