Hi; here's an arm pullreq. Most of it is refactoring and similar cleanup type patches. I just switched to using gitlab as the host for pullreq tags; I think I got the config change right but let me know if this is broken somehow.
thanks -- PMM The following changes since commit 6138e72b7e33e0240ee955a2754dd038ee99494d: Merge tag 'pull-tcg-20250630' of https://gitlab.com/rth7680/qemu into staging (2025-07-01 04:25:08 -0400) are available in the Git repository at: https://gitlab.com/pm215/qemu.git tags/pull-target-arm-20250701-1 for you to fetch changes up to 7bc86ccbb59f2022014e132327a33b94a7ed00fe: tests/functional: test device passthrough on aarch64 (2025-07-01 17:22:31 +0100) ---------------------------------------------------------------- target-arm queue: * MAINTAINERS update for arm hvf * target/arm: Make RETA[AB] UNDEF when pauth is not implemented * target/arm: Refactoring of ID register value storage * target/arm: Various refactoring/cleanup patches * virt: Don't show an ITS in ACPI tables when no ITS is present * tests/functional: test device passthrough on aarch64 * tests/functional: Expand Aarch64 SMMU tests to run on HVF accelerator ---------------------------------------------------------------- Cornelia Huck (1): arm/kvm: use fd instead of fdarray[2] Eric Auger (11): arm/cpu: Add sysreg definitions in cpu-sysregs.h arm/cpu: Store aa64isar0/aa64zfr0 into the idregs arrays arm/cpu: Store aa64isar1/2 into the idregs array arm/cpu: Store aa64pfr0/1 into the idregs array arm/cpu: Store aa64mmfr0-3 into the idregs array arm/cpu: Store aa64dfr0/1 into the idregs array arm/cpu: Store aa64smfr0 into the idregs array arm/cpu: Store id_isar0-7 into the idregs array arm/cpu: Store id_pfr0/1/2 into the idregs array arm/cpu: Store id_dfr0/1 into the idregs array arm/cpu: Store id_mmfr0-5 into the idregs array Gustavo Romero (6): hw/arm/virt: Simplify logic for setting instance's 'tcg_its' variable hw/arm/virt-acpi-build: Improve comment in build_iort hw/arm/virt-acpi-build: Factor out create_its_idmaps qtest/bios-tables-test: Add blobs for its=off test on aarch64 hw/arm/virt-acpi-build: Fix ACPI IORT and MADT tables when its=off qtest/bios-tables-test: Update blobs for its=off test on aarch64 Mads Ynddal (1): MAINTAINERS: add myself as reviewer for Apple Silicon HVF Peter Maydell (1): tests/functional: Add hvf_available() helper Philippe Mathieu-Daudé (21): hw/intc/gicv3_its: Do not check its_class_name() hw/arm/virt: Simplify create_its() qtest/bios-tables-test: Add test for when ITS is off on aarch64 target/arm: Remove arm_handle_psci_call() stub target/arm: Reduce arm_cpu_post_init() declaration scope target/arm: Unify gen_exception_internal() target/arm/hvf: Directly re-lock BQL after hv_vcpu_run() target/arm/hvf: Trace hv_vcpu_run() failures accel/hvf: Trace VM memory mapping target/arm/hvf: Log $pc in hvf_unknown_hvc() trace event target/arm: Correct KVM & HVF dtb_compatible value target/arm/hvf: Pass @target_el argument to hvf_raise_exception() target/arm: Restrict system register properties to system binary hw/arm/virt: Make EL3-guest accel check an accept-list hw/arm/virt: Make EL2 accelerator check an accept-list hw/arm/virt: Rename cpu_post_init() -> post_cpus_gic_realized() hw/arm/sbsa-ref: Tidy up use of RAMLIMIT_GB definition tests/functional: Set sbsa-ref machine type in each test function tests/functional: Restrict nested Aarch64 Xen test to TCG tests/functional: Require TCG to run Aarch64 imx8mp-evk test tests/functional: Expand Aarch64 SMMU tests to run on HVF accelerator Pierrick Bouvier (1): tests/functional: test device passthrough on aarch64 Solomon Tan (1): target/arm: Make RETA[AB] UNDEF when pauth is not implemented MAINTAINERS | 2 + meson.build | 1 + accel/hvf/trace.h | 2 + include/hw/intc/arm_gicv3_its_common.h | 2 +- target/arm/cpu-features.h | 317 +++++++------- target/arm/cpu-sysregs.h | 42 ++ target/arm/cpu.h | 82 ++-- target/arm/internals.h | 12 +- target/arm/tcg/translate.h | 1 + target/arm/cpu-sysregs.h.inc | 36 ++ accel/hvf/hvf-accel-ops.c | 6 + hw/arm/sbsa-ref.c | 8 +- hw/arm/virt-acpi-build.c | 186 ++++++--- hw/arm/virt.c | 38 +- hw/intc/armv7m_nvic.c | 27 +- target/arm/cpu.c | 124 +++--- target/arm/cpu64.c | 128 +++--- target/arm/helper.c | 68 +-- target/arm/hvf/hvf.c | 72 ++-- target/arm/kvm.c | 139 +++---- target/arm/ptw.c | 6 +- target/arm/tcg/cpu-v7m.c | 174 ++++---- target/arm/tcg/cpu32.c | 320 +++++++------- target/arm/tcg/cpu64.c | 459 +++++++++++---------- target/arm/tcg/translate-a64.c | 10 +- target/arm/tcg/translate.c | 2 +- tests/qtest/bios-tables-test.c | 21 + accel/hvf/trace-events | 7 + python/qemu/utils/__init__.py | 8 +- python/qemu/utils/accel.py | 9 + target/arm/hvf/trace-events | 5 +- tests/data/acpi/aarch64/virt/APIC.its_off | Bin 0 -> 164 bytes tests/data/acpi/aarch64/virt/IORT.its_off | Bin 0 -> 172 bytes tests/functional/meson.build | 2 + tests/functional/qemu_test/testcase.py | 6 +- .../functional/test_aarch64_device_passthrough.py | 142 +++++++ tests/functional/test_aarch64_imx8mp_evk.py | 1 + tests/functional/test_aarch64_sbsaref.py | 5 +- tests/functional/test_aarch64_sbsaref_alpine.py | 3 +- tests/functional/test_aarch64_sbsaref_freebsd.py | 3 +- tests/functional/test_aarch64_smmu.py | 12 +- tests/functional/test_aarch64_xen.py | 1 + 42 files changed, 1432 insertions(+), 1057 deletions(-) create mode 100644 accel/hvf/trace.h create mode 100644 target/arm/cpu-sysregs.h create mode 100644 target/arm/cpu-sysregs.h.inc create mode 100644 accel/hvf/trace-events create mode 100644 tests/data/acpi/aarch64/virt/APIC.its_off create mode 100644 tests/data/acpi/aarch64/virt/IORT.its_off create mode 100755 tests/functional/test_aarch64_device_passthrough.py
