On 7/2/25 21:31, etanous wrote:
On Wed, Jul 02, 2025 at 09:00:53AM +0200, Cédric Le Goater wrote:
External email: Use caution opening links or attachments
On 7/1/25 22:33, Ed Tanous wrote:
This patch series adds support for gb200-bmc, a baseboard management controller
module based on an Aspeed 2600 SOC.
Ed Tanous (4):
hw/arm: Add PCA9554 to ARM target
hw/arm/aspeed: Add second SPI chip to Aspeed model
docs: add support for gb200-bmc
hw/arm/aspeed: Add GB200 BMC target
docs/system/arm/aspeed.rst | 4 +-
hw/arm/Kconfig | 1 +
hw/arm/aspeed.c | 81 ++++++++++++++++++++++++++++++++++++++
hw/arm/aspeed_eeprom.c | 21 ++++++++++
hw/arm/aspeed_eeprom.h | 3 ++
include/hw/arm/aspeed.h | 2 +
6 files changed, 110 insertions(+), 2 deletions(-)
Could you provide a functional test for the gb200nvl-bmc machine too ?
See tests/functional/test_*aspeed* files.
Can do. It looks like images are pushed to
https://github.com/legoater/qemu-aspeed-boot and accepted via Github PR?
Yes. please do that. It seems the easiest way to collect FW images.
Please provide some info on how it was built, openbmc version, repo, etc.
Thanks,
C.
