On Tue, Jun 24, 2025 at 12:54 AM Daniel Henrique Barboza
<dbarb...@ventanamicro.com> wrote:
>
> Commit b84694defb added the CPU_DUMP_VPU to allow vector registers to be
> logged by log_cpu_exec() in TCG. This flag was then used in commit
> b227f6a8a7 to print RISC-V vector registers using this flag. Note that
> this change was done in riscv_cpu_dump_state(), the cpu_dump_state()
> callback for RISC-V, the same callback used in hmp_info_registers().
>
> Back then we forgot to change hmp_info_registers(), and 'info registers'
> isn't showing RISC-V vector registers as a result. No other target is
> impacted since only RISC-V is using CPU_DUMP_VPU.
>
> There's no reason to not show VPU regs in info_registers(), so add
> CPU_DUMP_VPU to hmp_info_registers(). This will print vector registers
> for all RISC-V machines and, as said above, has no impact in other
> archs.
>
> Cc: Dr. David Alan Gilbert <d...@treblig.org>
> Signed-off-by: Daniel Henrique Barboza <dbarb...@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.fran...@wdc.com>
Alistair
> ---
> monitor/hmp-cmds-target.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/monitor/hmp-cmds-target.c b/monitor/hmp-cmds-target.c
> index 8eaf70d9c9..e982061146 100644
> --- a/monitor/hmp-cmds-target.c
> +++ b/monitor/hmp-cmds-target.c
> @@ -102,7 +102,7 @@ void hmp_info_registers(Monitor *mon, const QDict *qdict)
> if (all_cpus) {
> CPU_FOREACH(cs) {
> monitor_printf(mon, "\nCPU#%d\n", cs->cpu_index);
> - cpu_dump_state(cs, NULL, CPU_DUMP_FPU);
> + cpu_dump_state(cs, NULL, CPU_DUMP_FPU | CPU_DUMP_VPU);
> }
> } else {
> cs = vcpu >= 0 ? qemu_get_cpu(vcpu) : mon_get_cpu(mon);
> @@ -117,7 +117,7 @@ void hmp_info_registers(Monitor *mon, const QDict *qdict)
> }
>
> monitor_printf(mon, "\nCPU#%d\n", cs->cpu_index);
> - cpu_dump_state(cs, NULL, CPU_DUMP_FPU);
> + cpu_dump_state(cs, NULL, CPU_DUMP_FPU | CPU_DUMP_VPU);
> }
> }
>
> --
> 2.49.0
>
>
