On Wed, Jul 16, 2025 at 11:54:18AM +0200, Luc Michel wrote:
> Remove now unused macros in xlnx-versal.[ch]. Those macros have been
> replaced by the VersalMap structure that serves as a central description
> for the SoC. The ones still in use in the versal_unimp function are
> inlined.
>
> Signed-off-by: Luc Michel <luc.mic...@amd.com>
Reviewed-by: Francisco Iglesias <francisco.igles...@amd.com>
> ---
> include/hw/arm/xlnx-versal.h | 204 -----------------------------------
> hw/arm/xlnx-versal.c | 28 ++---
> 2 files changed, 7 insertions(+), 225 deletions(-)
>
> diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h
> index 3be9f0a5550..bdfab2a5426 100644
> --- a/include/hw/arm/xlnx-versal.h
> +++ b/include/hw/arm/xlnx-versal.h
> @@ -21,22 +21,10 @@
> #define TYPE_XLNX_VERSAL_BASE "xlnx-versal-base"
> OBJECT_DECLARE_TYPE(Versal, VersalClass, XLNX_VERSAL_BASE)
>
> #define TYPE_XLNX_VERSAL "xlnx-versal"
>
> -#define XLNX_VERSAL_NR_ACPUS 2
> -#define XLNX_VERSAL_NR_RCPUS 2
> -#define XLNX_VERSAL_NR_UARTS 2
> -#define XLNX_VERSAL_NR_GEMS 2
> -#define XLNX_VERSAL_NR_ADMAS 8
> -#define XLNX_VERSAL_NR_SDS 2
> -#define XLNX_VERSAL_NR_XRAM 4
> -#define XLNX_VERSAL_NR_IRQS 192
> -#define XLNX_VERSAL_NR_CANFD 2
> -#define XLNX_VERSAL_CANFD_REF_CLK (24 * 1000 * 1000)
> -#define XLNX_VERSAL_NR_CFRAME 15
> -
> struct Versal {
> /*< private >*/
> SysBusDevice parent_obj;
>
> /*< public >*/
> @@ -81,198 +69,6 @@ hwaddr versal_get_reserved_mmio_addr(Versal *s);
>
> int versal_get_num_cpu(VersalVersion version);
> int versal_get_num_can(VersalVersion version);
> int versal_get_num_sdhci(VersalVersion version);
>
> -/* Memory-map and IRQ definitions. Copied a subset from
> - * auto-generated files. */
> -
> -#define VERSAL_CRL_IRQ 10
> -#define VERSAL_UART0_IRQ_0 18
> -#define VERSAL_UART1_IRQ_0 19
> -#define VERSAL_CANFD0_IRQ_0 20
> -#define VERSAL_CANFD1_IRQ_0 21
> -#define VERSAL_USB0_IRQ_0 22
> -#define VERSAL_GEM0_IRQ_0 56
> -#define VERSAL_GEM0_WAKE_IRQ_0 57
> -#define VERSAL_GEM1_IRQ_0 58
> -#define VERSAL_GEM1_WAKE_IRQ_0 59
> -#define VERSAL_ADMA_IRQ_0 60
> -#define VERSAL_XRAM_IRQ_0 79
> -#define VERSAL_CFU_IRQ_0 120
> -#define VERSAL_PMC_APB_IRQ 121
> -#define VERSAL_OSPI_IRQ 124
> -#define VERSAL_SD0_IRQ_0 126
> -#define VERSAL_EFUSE_IRQ 139
> -#define VERSAL_TRNG_IRQ 141
> -#define VERSAL_RTC_ALARM_IRQ 142
> -#define VERSAL_RTC_SECONDS_IRQ 143
> -
> -/* Architecturally reserved IRQs suitable for virtualization. */
> -#define VERSAL_RSVD_IRQ_FIRST 111
> -#define VERSAL_RSVD_IRQ_LAST 118
> -
> -#define MM_TOP_RSVD 0xa0000000U
> -#define MM_TOP_RSVD_SIZE 0x4000000
> -#define MM_GIC_APU_DIST_MAIN 0xf9000000U
> -#define MM_GIC_APU_DIST_MAIN_SIZE 0x10000
> -#define MM_GIC_APU_REDIST_0 0xf9080000U
> -#define MM_GIC_APU_REDIST_0_SIZE 0x80000
> -
> -#define MM_UART0 0xff000000U
> -#define MM_UART0_SIZE 0x10000
> -#define MM_UART1 0xff010000U
> -#define MM_UART1_SIZE 0x10000
> -
> -#define MM_CANFD0 0xff060000U
> -#define MM_CANFD0_SIZE 0x10000
> -#define MM_CANFD1 0xff070000U
> -#define MM_CANFD1_SIZE 0x10000
> -
> -#define MM_GEM0 0xff0c0000U
> -#define MM_GEM0_SIZE 0x10000
> -#define MM_GEM1 0xff0d0000U
> -#define MM_GEM1_SIZE 0x10000
> -
> -#define MM_ADMA_CH0 0xffa80000U
> -#define MM_ADMA_CH0_SIZE 0x10000
> -
> -#define MM_OCM 0xfffc0000U
> -#define MM_OCM_SIZE 0x40000
> -
> -#define MM_XRAM 0xfe800000
> -#define MM_XRAMC 0xff8e0000
> -#define MM_XRAMC_SIZE 0x10000
> -
> -#define MM_USB2_CTRL_REGS 0xFF9D0000
> -#define MM_USB2_CTRL_REGS_SIZE 0x10000
> -
> -#define MM_USB_0 0xFE200000
> -#define MM_USB_0_SIZE 0x10000
> -
> -#define MM_TOP_DDR 0x0
> -#define MM_TOP_DDR_SIZE 0x80000000U
> -#define MM_TOP_DDR_2 0x800000000ULL
> -#define MM_TOP_DDR_2_SIZE 0x800000000ULL
> -#define MM_TOP_DDR_3 0xc000000000ULL
> -#define MM_TOP_DDR_3_SIZE 0x4000000000ULL
> -#define MM_TOP_DDR_4 0x10000000000ULL
> -#define MM_TOP_DDR_4_SIZE 0xb780000000ULL
> -
> -#define MM_PSM_START 0xffc80000U
> -#define MM_PSM_END 0xffcf0000U
> -
> -#define MM_CRL 0xff5e0000U
> -#define MM_CRL_SIZE 0x300000
> -#define MM_IOU_SCNTR 0xff130000U
> -#define MM_IOU_SCNTR_SIZE 0x10000
> -#define MM_IOU_SCNTRS 0xff140000U
> -#define MM_IOU_SCNTRS_SIZE 0x10000
> -#define MM_FPD_CRF 0xfd1a0000U
> -#define MM_FPD_CRF_SIZE 0x140000
> -#define MM_FPD_FPD_APU 0xfd5c0000
> -#define MM_FPD_FPD_APU_SIZE 0x100
> -
> -#define MM_PMC_PMC_IOU_SLCR 0xf1060000
> -#define MM_PMC_PMC_IOU_SLCR_SIZE 0x10000
> -
> -#define MM_PMC_OSPI 0xf1010000
> -#define MM_PMC_OSPI_SIZE 0x10000
> -
> -#define MM_PMC_OSPI_DAC 0xc0000000
> -#define MM_PMC_OSPI_DAC_SIZE 0x20000000
> -
> -#define MM_PMC_OSPI_DMA_DST 0xf1011800
> -#define MM_PMC_OSPI_DMA_SRC 0xf1011000
> -
> -#define MM_PMC_SD0 0xf1040000U
> -#define MM_PMC_SD0_SIZE 0x10000
> -#define MM_PMC_BBRAM_CTRL 0xf11f0000
> -#define MM_PMC_BBRAM_CTRL_SIZE 0x00050
> -#define MM_PMC_EFUSE_CTRL 0xf1240000
> -#define MM_PMC_EFUSE_CTRL_SIZE 0x00104
> -#define MM_PMC_EFUSE_CACHE 0xf1250000
> -#define MM_PMC_EFUSE_CACHE_SIZE 0x00C00
> -
> -#define MM_PMC_CFU_APB 0xf12b0000
> -#define MM_PMC_CFU_APB_SIZE 0x10000
> -#define MM_PMC_CFU_STREAM 0xf12c0000
> -#define MM_PMC_CFU_STREAM_SIZE 0x1000
> -#define MM_PMC_CFU_SFR 0xf12c1000
> -#define MM_PMC_CFU_SFR_SIZE 0x1000
> -#define MM_PMC_CFU_FDRO 0xf12c2000
> -#define MM_PMC_CFU_FDRO_SIZE 0x1000
> -#define MM_PMC_CFU_STREAM_2 0xf1f80000
> -#define MM_PMC_CFU_STREAM_2_SIZE 0x40000
> -
> -#define MM_PMC_CFRAME0_REG 0xf12d0000
> -#define MM_PMC_CFRAME0_REG_SIZE 0x1000
> -#define MM_PMC_CFRAME0_FDRI 0xf12d1000
> -#define MM_PMC_CFRAME0_FDRI_SIZE 0x1000
> -#define MM_PMC_CFRAME1_REG 0xf12d2000
> -#define MM_PMC_CFRAME1_REG_SIZE 0x1000
> -#define MM_PMC_CFRAME1_FDRI 0xf12d3000
> -#define MM_PMC_CFRAME1_FDRI_SIZE 0x1000
> -#define MM_PMC_CFRAME2_REG 0xf12d4000
> -#define MM_PMC_CFRAME2_REG_SIZE 0x1000
> -#define MM_PMC_CFRAME2_FDRI 0xf12d5000
> -#define MM_PMC_CFRAME2_FDRI_SIZE 0x1000
> -#define MM_PMC_CFRAME3_REG 0xf12d6000
> -#define MM_PMC_CFRAME3_REG_SIZE 0x1000
> -#define MM_PMC_CFRAME3_FDRI 0xf12d7000
> -#define MM_PMC_CFRAME3_FDRI_SIZE 0x1000
> -#define MM_PMC_CFRAME4_REG 0xf12d8000
> -#define MM_PMC_CFRAME4_REG_SIZE 0x1000
> -#define MM_PMC_CFRAME4_FDRI 0xf12d9000
> -#define MM_PMC_CFRAME4_FDRI_SIZE 0x1000
> -#define MM_PMC_CFRAME5_REG 0xf12da000
> -#define MM_PMC_CFRAME5_REG_SIZE 0x1000
> -#define MM_PMC_CFRAME5_FDRI 0xf12db000
> -#define MM_PMC_CFRAME5_FDRI_SIZE 0x1000
> -#define MM_PMC_CFRAME6_REG 0xf12dc000
> -#define MM_PMC_CFRAME6_REG_SIZE 0x1000
> -#define MM_PMC_CFRAME6_FDRI 0xf12dd000
> -#define MM_PMC_CFRAME6_FDRI_SIZE 0x1000
> -#define MM_PMC_CFRAME7_REG 0xf12de000
> -#define MM_PMC_CFRAME7_REG_SIZE 0x1000
> -#define MM_PMC_CFRAME7_FDRI 0xf12df000
> -#define MM_PMC_CFRAME7_FDRI_SIZE 0x1000
> -#define MM_PMC_CFRAME8_REG 0xf12e0000
> -#define MM_PMC_CFRAME8_REG_SIZE 0x1000
> -#define MM_PMC_CFRAME8_FDRI 0xf12e1000
> -#define MM_PMC_CFRAME8_FDRI_SIZE 0x1000
> -#define MM_PMC_CFRAME9_REG 0xf12e2000
> -#define MM_PMC_CFRAME9_REG_SIZE 0x1000
> -#define MM_PMC_CFRAME9_FDRI 0xf12e3000
> -#define MM_PMC_CFRAME9_FDRI_SIZE 0x1000
> -#define MM_PMC_CFRAME10_REG 0xf12e4000
> -#define MM_PMC_CFRAME10_REG_SIZE 0x1000
> -#define MM_PMC_CFRAME10_FDRI 0xf12e5000
> -#define MM_PMC_CFRAME10_FDRI_SIZE 0x1000
> -#define MM_PMC_CFRAME11_REG 0xf12e6000
> -#define MM_PMC_CFRAME11_REG_SIZE 0x1000
> -#define MM_PMC_CFRAME11_FDRI 0xf12e7000
> -#define MM_PMC_CFRAME11_FDRI_SIZE 0x1000
> -#define MM_PMC_CFRAME12_REG 0xf12e8000
> -#define MM_PMC_CFRAME12_REG_SIZE 0x1000
> -#define MM_PMC_CFRAME12_FDRI 0xf12e9000
> -#define MM_PMC_CFRAME12_FDRI_SIZE 0x1000
> -#define MM_PMC_CFRAME13_REG 0xf12ea000
> -#define MM_PMC_CFRAME13_REG_SIZE 0x1000
> -#define MM_PMC_CFRAME13_FDRI 0xf12eb000
> -#define MM_PMC_CFRAME13_FDRI_SIZE 0x1000
> -#define MM_PMC_CFRAME14_REG 0xf12ec000
> -#define MM_PMC_CFRAME14_REG_SIZE 0x1000
> -#define MM_PMC_CFRAME14_FDRI 0xf12ed000
> -#define MM_PMC_CFRAME14_FDRI_SIZE 0x1000
> -#define MM_PMC_CFRAME_BCAST_REG 0xf12ee000
> -#define MM_PMC_CFRAME_BCAST_REG_SIZE 0x1000
> -#define MM_PMC_CFRAME_BCAST_FDRI 0xf12ef000
> -#define MM_PMC_CFRAME_BCAST_FDRI_SIZE 0x1000
> -
> -#define MM_PMC_CRP 0xf1260000U
> -#define MM_PMC_CRP_SIZE 0x10000
> -#define MM_PMC_RTC 0xf12a0000
> -#define MM_PMC_RTC_SIZE 0x10000
> -#define MM_PMC_TRNG 0xf1230000
> -#define MM_PMC_TRNG_SIZE 0x10000
> #endif
> diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
> index c513d28c8d4..aef53876f26 100644
> --- a/hw/arm/xlnx-versal.c
> +++ b/hw/arm/xlnx-versal.c
> @@ -16,11 +16,10 @@
> #include "qobject/qlist.h"
> #include "qemu/module.h"
> #include "hw/sysbus.h"
> #include "net/net.h"
> #include "system/system.h"
> -#include "hw/arm/boot.h"
> #include "hw/misc/unimp.h"
> #include "hw/arm/xlnx-versal.h"
> #include "qemu/log.h"
> #include "target/arm/cpu-qom.h"
> #include "target/arm/gtimer.h"
> @@ -49,17 +48,10 @@
> #include "hw/core/split-irq.h"
> #include "target/arm/cpu.h"
> #include "hw/cpu/cluster.h"
> #include "hw/arm/bsa.h"
>
> -#define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72")
> -#define XLNX_VERSAL_RCPU_TYPE ARM_CPU_TYPE_NAME("cortex-r5f")
> -#define GEM_REVISION 0x40070106
> -
> -#define VERSAL_NUM_PMC_APB_IRQS 18
> -#define NUM_OSPI_IRQ_LINES 3
> -
> /*
> * IRQ descriptor to catch the following cases:
> * - Multiple devices can connect to the same IRQ. They are OR'ed together.
> */
> FIELD(VERSAL_IRQ, IRQ, 0, 16)
> @@ -1361,11 +1353,11 @@ static DeviceState *versal_create_ospi(Versal *s,
>
> memory_region_add_subregion(&s->mr_ps, map->dac,
> linear_mr);
>
> /* OSPI irq */
> - orgate = create_or_gate(s, OBJECT(dev), "irq-orgate", NUM_OSPI_IRQ_LINES,
> + orgate = create_or_gate(s, OBJECT(dev), "irq-orgate", 3,
> map->irq);
>
> sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(orgate, 0));
> sysbus_connect_irq(SYS_BUS_DEVICE(dma_src), 0, qdev_get_gpio_in(orgate,
> 1));
> sysbus_connect_irq(SYS_BUS_DEVICE(dma_dst), 0, qdev_get_gpio_in(orgate,
> 2));
> @@ -1622,22 +1614,16 @@ static void versal_unimp_irq_parity_imr(void *opaque,
> int n, int level)
> static void versal_unimp(Versal *s)
> {
> DeviceState *slcr;
> qemu_irq gpio_in;
>
> - versal_unimp_area(s, "psm", &s->mr_ps,
> - MM_PSM_START, MM_PSM_END - MM_PSM_START);
> - versal_unimp_area(s, "crf", &s->mr_ps,
> - MM_FPD_CRF, MM_FPD_CRF_SIZE);
> - versal_unimp_area(s, "apu", &s->mr_ps,
> - MM_FPD_FPD_APU, MM_FPD_FPD_APU_SIZE);
> - versal_unimp_area(s, "crp", &s->mr_ps,
> - MM_PMC_CRP, MM_PMC_CRP_SIZE);
> - versal_unimp_area(s, "iou-scntr", &s->mr_ps,
> - MM_IOU_SCNTR, MM_IOU_SCNTR_SIZE);
> - versal_unimp_area(s, "iou-scntr-seucre", &s->mr_ps,
> - MM_IOU_SCNTRS, MM_IOU_SCNTRS_SIZE);
> + versal_unimp_area(s, "psm", &s->mr_ps, 0xffc80000, 0x70000);
> + versal_unimp_area(s, "crf", &s->mr_ps, 0xfd1a0000, 0x140000);
> + versal_unimp_area(s, "apu", &s->mr_ps, 0xfd5c0000, 0x100);
> + versal_unimp_area(s, "crp", &s->mr_ps, 0xf1260000, 0x10000);
> + versal_unimp_area(s, "iou-scntr", &s->mr_ps, 0xff130000, 0x10000);
> + versal_unimp_area(s, "iou-scntr-seucre", &s->mr_ps, 0xff140000, 0x10000);
>
> qdev_init_gpio_in_named(DEVICE(s), versal_unimp_sd_emmc_sel,
> "sd-emmc-sel-dummy", 2);
> qdev_init_gpio_in_named(DEVICE(s), versal_unimp_qspi_ospi_mux_sel,
> "qspi-ospi-mux-sel-dummy", 1);
> --
> 2.50.0
>
