Change the return type to abi_ulong, and pass in the cpu.
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
---
linux-user/loader.h | 2 +-
linux-user/ppc/target_elf.h | 3 +
linux-user/elfload.c | 116 +-----------------------------------
linux-user/ppc/elfload.c | 116 ++++++++++++++++++++++++++++++++++++
4 files changed, 122 insertions(+), 115 deletions(-)
diff --git a/linux-user/loader.h b/linux-user/loader.h
index 2c8414e0e5..818c5e6d7d 100644
--- a/linux-user/loader.h
+++ b/linux-user/loader.h
@@ -102,7 +102,7 @@ extern unsigned long guest_stack_size;
const char *get_elf_cpu_model(uint32_t eflags);
#if defined(TARGET_I386) || defined(TARGET_X86_64) || defined(TARGET_ARM) \
- || defined(TARGET_SPARC)
+ || defined(TARGET_SPARC) || defined(TARGET_PPC)
abi_ulong get_elf_hwcap(CPUState *cs);
abi_ulong get_elf_hwcap2(CPUState *cs);
#endif
diff --git a/linux-user/ppc/target_elf.h b/linux-user/ppc/target_elf.h
index 8c0a8ea431..4203a89d66 100644
--- a/linux-user/ppc/target_elf.h
+++ b/linux-user/ppc/target_elf.h
@@ -8,4 +8,7 @@
#ifndef PPC_TARGET_ELF_H
#define PPC_TARGET_ELF_H
+#define HAVE_ELF_HWCAP 1
+#define HAVE_ELF_HWCAP2 1
+
#endif
diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index 16709865f7..843b1f7b6c 100644
--- a/linux-user/elfload.c
+++ b/linux-user/elfload.c
@@ -598,120 +598,8 @@ static inline void init_thread(struct target_pt_regs
*regs,
#define ELF_ARCH EM_PPC
-/* Feature masks for the Aux Vector Hardware Capabilities (AT_HWCAP).
- See arch/powerpc/include/asm/cputable.h. */
-enum {
- QEMU_PPC_FEATURE_32 = 0x80000000,
- QEMU_PPC_FEATURE_64 = 0x40000000,
- QEMU_PPC_FEATURE_601_INSTR = 0x20000000,
- QEMU_PPC_FEATURE_HAS_ALTIVEC = 0x10000000,
- QEMU_PPC_FEATURE_HAS_FPU = 0x08000000,
- QEMU_PPC_FEATURE_HAS_MMU = 0x04000000,
- QEMU_PPC_FEATURE_HAS_4xxMAC = 0x02000000,
- QEMU_PPC_FEATURE_UNIFIED_CACHE = 0x01000000,
- QEMU_PPC_FEATURE_HAS_SPE = 0x00800000,
- QEMU_PPC_FEATURE_HAS_EFP_SINGLE = 0x00400000,
- QEMU_PPC_FEATURE_HAS_EFP_DOUBLE = 0x00200000,
- QEMU_PPC_FEATURE_NO_TB = 0x00100000,
- QEMU_PPC_FEATURE_POWER4 = 0x00080000,
- QEMU_PPC_FEATURE_POWER5 = 0x00040000,
- QEMU_PPC_FEATURE_POWER5_PLUS = 0x00020000,
- QEMU_PPC_FEATURE_CELL = 0x00010000,
- QEMU_PPC_FEATURE_BOOKE = 0x00008000,
- QEMU_PPC_FEATURE_SMT = 0x00004000,
- QEMU_PPC_FEATURE_ICACHE_SNOOP = 0x00002000,
- QEMU_PPC_FEATURE_ARCH_2_05 = 0x00001000,
- QEMU_PPC_FEATURE_PA6T = 0x00000800,
- QEMU_PPC_FEATURE_HAS_DFP = 0x00000400,
- QEMU_PPC_FEATURE_POWER6_EXT = 0x00000200,
- QEMU_PPC_FEATURE_ARCH_2_06 = 0x00000100,
- QEMU_PPC_FEATURE_HAS_VSX = 0x00000080,
- QEMU_PPC_FEATURE_PSERIES_PERFMON_COMPAT = 0x00000040,
-
- QEMU_PPC_FEATURE_TRUE_LE = 0x00000002,
- QEMU_PPC_FEATURE_PPC_LE = 0x00000001,
-
- /* Feature definitions in AT_HWCAP2. */
- QEMU_PPC_FEATURE2_ARCH_2_07 = 0x80000000, /* ISA 2.07 */
- QEMU_PPC_FEATURE2_HAS_HTM = 0x40000000, /* Hardware Transactional Memory */
- QEMU_PPC_FEATURE2_HAS_DSCR = 0x20000000, /* Data Stream Control Register */
- QEMU_PPC_FEATURE2_HAS_EBB = 0x10000000, /* Event Base Branching */
- QEMU_PPC_FEATURE2_HAS_ISEL = 0x08000000, /* Integer Select */
- QEMU_PPC_FEATURE2_HAS_TAR = 0x04000000, /* Target Address Register */
- QEMU_PPC_FEATURE2_VEC_CRYPTO = 0x02000000,
- QEMU_PPC_FEATURE2_HTM_NOSC = 0x01000000,
- QEMU_PPC_FEATURE2_ARCH_3_00 = 0x00800000, /* ISA 3.00 */
- QEMU_PPC_FEATURE2_HAS_IEEE128 = 0x00400000, /* VSX IEEE Bin Float 128-bit
*/
- QEMU_PPC_FEATURE2_DARN = 0x00200000, /* darn random number insn */
- QEMU_PPC_FEATURE2_SCV = 0x00100000, /* scv syscall */
- QEMU_PPC_FEATURE2_HTM_NO_SUSPEND = 0x00080000, /* TM w/o suspended state */
- QEMU_PPC_FEATURE2_ARCH_3_1 = 0x00040000, /* ISA 3.1 */
- QEMU_PPC_FEATURE2_MMA = 0x00020000, /* Matrix-Multiply Assist */
-};
-
-#define ELF_HWCAP get_elf_hwcap()
-
-static uint32_t get_elf_hwcap(void)
-{
- PowerPCCPU *cpu = POWERPC_CPU(thread_cpu);
- uint32_t features = 0;
-
- /* We don't have to be terribly complete here; the high points are
- Altivec/FP/SPE support. Anything else is just a bonus. */
-#define GET_FEATURE(flag, feature) \
- do { if (cpu->env.insns_flags & flag) { features |= feature; } } while (0)
-#define GET_FEATURE2(flags, feature) \
- do { \
- if ((cpu->env.insns_flags2 & flags) == flags) { \
- features |= feature; \
- } \
- } while (0)
- GET_FEATURE(PPC_64B, QEMU_PPC_FEATURE_64);
- GET_FEATURE(PPC_FLOAT, QEMU_PPC_FEATURE_HAS_FPU);
- GET_FEATURE(PPC_ALTIVEC, QEMU_PPC_FEATURE_HAS_ALTIVEC);
- GET_FEATURE(PPC_SPE, QEMU_PPC_FEATURE_HAS_SPE);
- GET_FEATURE(PPC_SPE_SINGLE, QEMU_PPC_FEATURE_HAS_EFP_SINGLE);
- GET_FEATURE(PPC_SPE_DOUBLE, QEMU_PPC_FEATURE_HAS_EFP_DOUBLE);
- GET_FEATURE(PPC_BOOKE, QEMU_PPC_FEATURE_BOOKE);
- GET_FEATURE(PPC_405_MAC, QEMU_PPC_FEATURE_HAS_4xxMAC);
- GET_FEATURE2(PPC2_DFP, QEMU_PPC_FEATURE_HAS_DFP);
- GET_FEATURE2(PPC2_VSX, QEMU_PPC_FEATURE_HAS_VSX);
- GET_FEATURE2((PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 | PPC2_ATOMIC_ISA206 |
- PPC2_FP_CVT_ISA206 | PPC2_FP_TST_ISA206),
- QEMU_PPC_FEATURE_ARCH_2_06);
-#undef GET_FEATURE
-#undef GET_FEATURE2
-
- return features;
-}
-
-#define ELF_HWCAP2 get_elf_hwcap2()
-
-static uint32_t get_elf_hwcap2(void)
-{
- PowerPCCPU *cpu = POWERPC_CPU(thread_cpu);
- uint32_t features = 0;
-
-#define GET_FEATURE(flag, feature) \
- do { if (cpu->env.insns_flags & flag) { features |= feature; } } while (0)
-#define GET_FEATURE2(flag, feature) \
- do { if (cpu->env.insns_flags2 & flag) { features |= feature; } } while (0)
-
- GET_FEATURE(PPC_ISEL, QEMU_PPC_FEATURE2_HAS_ISEL);
- GET_FEATURE2(PPC2_BCTAR_ISA207, QEMU_PPC_FEATURE2_HAS_TAR);
- GET_FEATURE2((PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 |
- PPC2_ISA207S), QEMU_PPC_FEATURE2_ARCH_2_07 |
- QEMU_PPC_FEATURE2_VEC_CRYPTO);
- GET_FEATURE2(PPC2_ISA300, QEMU_PPC_FEATURE2_ARCH_3_00 |
- QEMU_PPC_FEATURE2_DARN | QEMU_PPC_FEATURE2_HAS_IEEE128);
- GET_FEATURE2(PPC2_ISA310, QEMU_PPC_FEATURE2_ARCH_3_1 |
- QEMU_PPC_FEATURE2_MMA);
-
-#undef GET_FEATURE
-#undef GET_FEATURE2
-
- return features;
-}
+#define ELF_HWCAP get_elf_hwcap(thread_cpu)
+#define ELF_HWCAP2 get_elf_hwcap2(thread_cpu)
/*
* The requirements here are:
diff --git a/linux-user/ppc/elfload.c b/linux-user/ppc/elfload.c
index 7775dc06fa..a214675650 100644
--- a/linux-user/ppc/elfload.c
+++ b/linux-user/ppc/elfload.c
@@ -13,3 +13,119 @@ const char *get_elf_cpu_model(uint32_t eflags)
return "750";
#endif
}
+
+/*
+ * Feature masks for the Aux Vector Hardware Capabilities (AT_HWCAP).
+ * See arch/powerpc/include/asm/cputable.h.
+ */
+enum {
+ QEMU_PPC_FEATURE_32 = 0x80000000,
+ QEMU_PPC_FEATURE_64 = 0x40000000,
+ QEMU_PPC_FEATURE_601_INSTR = 0x20000000,
+ QEMU_PPC_FEATURE_HAS_ALTIVEC = 0x10000000,
+ QEMU_PPC_FEATURE_HAS_FPU = 0x08000000,
+ QEMU_PPC_FEATURE_HAS_MMU = 0x04000000,
+ QEMU_PPC_FEATURE_HAS_4xxMAC = 0x02000000,
+ QEMU_PPC_FEATURE_UNIFIED_CACHE = 0x01000000,
+ QEMU_PPC_FEATURE_HAS_SPE = 0x00800000,
+ QEMU_PPC_FEATURE_HAS_EFP_SINGLE = 0x00400000,
+ QEMU_PPC_FEATURE_HAS_EFP_DOUBLE = 0x00200000,
+ QEMU_PPC_FEATURE_NO_TB = 0x00100000,
+ QEMU_PPC_FEATURE_POWER4 = 0x00080000,
+ QEMU_PPC_FEATURE_POWER5 = 0x00040000,
+ QEMU_PPC_FEATURE_POWER5_PLUS = 0x00020000,
+ QEMU_PPC_FEATURE_CELL = 0x00010000,
+ QEMU_PPC_FEATURE_BOOKE = 0x00008000,
+ QEMU_PPC_FEATURE_SMT = 0x00004000,
+ QEMU_PPC_FEATURE_ICACHE_SNOOP = 0x00002000,
+ QEMU_PPC_FEATURE_ARCH_2_05 = 0x00001000,
+ QEMU_PPC_FEATURE_PA6T = 0x00000800,
+ QEMU_PPC_FEATURE_HAS_DFP = 0x00000400,
+ QEMU_PPC_FEATURE_POWER6_EXT = 0x00000200,
+ QEMU_PPC_FEATURE_ARCH_2_06 = 0x00000100,
+ QEMU_PPC_FEATURE_HAS_VSX = 0x00000080,
+ QEMU_PPC_FEATURE_PSERIES_PERFMON_COMPAT = 0x00000040,
+
+ QEMU_PPC_FEATURE_TRUE_LE = 0x00000002,
+ QEMU_PPC_FEATURE_PPC_LE = 0x00000001,
+
+ /* Feature definitions in AT_HWCAP2. */
+ QEMU_PPC_FEATURE2_ARCH_2_07 = 0x80000000, /* ISA 2.07 */
+ QEMU_PPC_FEATURE2_HAS_HTM = 0x40000000, /* Hardware Transactional Memory */
+ QEMU_PPC_FEATURE2_HAS_DSCR = 0x20000000, /* Data Stream Control Register */
+ QEMU_PPC_FEATURE2_HAS_EBB = 0x10000000, /* Event Base Branching */
+ QEMU_PPC_FEATURE2_HAS_ISEL = 0x08000000, /* Integer Select */
+ QEMU_PPC_FEATURE2_HAS_TAR = 0x04000000, /* Target Address Register */
+ QEMU_PPC_FEATURE2_VEC_CRYPTO = 0x02000000,
+ QEMU_PPC_FEATURE2_HTM_NOSC = 0x01000000,
+ QEMU_PPC_FEATURE2_ARCH_3_00 = 0x00800000, /* ISA 3.00 */
+ QEMU_PPC_FEATURE2_HAS_IEEE128 = 0x00400000, /* VSX IEEE Bin Float 128-bit
*/
+ QEMU_PPC_FEATURE2_DARN = 0x00200000, /* darn random number insn */
+ QEMU_PPC_FEATURE2_SCV = 0x00100000, /* scv syscall */
+ QEMU_PPC_FEATURE2_HTM_NO_SUSPEND = 0x00080000, /* TM w/o suspended state */
+ QEMU_PPC_FEATURE2_ARCH_3_1 = 0x00040000, /* ISA 3.1 */
+ QEMU_PPC_FEATURE2_MMA = 0x00020000, /* Matrix-Multiply Assist */
+};
+
+abi_ulong get_elf_hwcap(CPUState *cs)
+{
+ PowerPCCPU *cpu = POWERPC_CPU(cs);
+ uint32_t features = 0;
+
+ /*
+ * We don't have to be terribly complete here; the high points are
+ * Altivec/FP/SPE support. Anything else is just a bonus.
+ */
+#define GET_FEATURE(flag, feature) \
+ do { if (cpu->env.insns_flags & flag) { features |= feature; } } while (0)
+#define GET_FEATURE2(flags, feature) \
+ do { \
+ if ((cpu->env.insns_flags2 & flags) == flags) { \
+ features |= feature; \
+ } \
+ } while (0)
+ GET_FEATURE(PPC_64B, QEMU_PPC_FEATURE_64);
+ GET_FEATURE(PPC_FLOAT, QEMU_PPC_FEATURE_HAS_FPU);
+ GET_FEATURE(PPC_ALTIVEC, QEMU_PPC_FEATURE_HAS_ALTIVEC);
+ GET_FEATURE(PPC_SPE, QEMU_PPC_FEATURE_HAS_SPE);
+ GET_FEATURE(PPC_SPE_SINGLE, QEMU_PPC_FEATURE_HAS_EFP_SINGLE);
+ GET_FEATURE(PPC_SPE_DOUBLE, QEMU_PPC_FEATURE_HAS_EFP_DOUBLE);
+ GET_FEATURE(PPC_BOOKE, QEMU_PPC_FEATURE_BOOKE);
+ GET_FEATURE(PPC_405_MAC, QEMU_PPC_FEATURE_HAS_4xxMAC);
+ GET_FEATURE2(PPC2_DFP, QEMU_PPC_FEATURE_HAS_DFP);
+ GET_FEATURE2(PPC2_VSX, QEMU_PPC_FEATURE_HAS_VSX);
+ GET_FEATURE2((PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 | PPC2_ATOMIC_ISA206 |
+ PPC2_FP_CVT_ISA206 | PPC2_FP_TST_ISA206),
+ QEMU_PPC_FEATURE_ARCH_2_06);
+
+#undef GET_FEATURE
+#undef GET_FEATURE2
+
+ return features;
+}
+
+abi_ulong get_elf_hwcap2(CPUState *cs)
+{
+ PowerPCCPU *cpu = POWERPC_CPU(cs);
+ uint32_t features = 0;
+
+#define GET_FEATURE(flag, feature) \
+ do { if (cpu->env.insns_flags & flag) { features |= feature; } } while (0)
+#define GET_FEATURE2(flag, feature) \
+ do { if (cpu->env.insns_flags2 & flag) { features |= feature; } } while (0)
+
+ GET_FEATURE(PPC_ISEL, QEMU_PPC_FEATURE2_HAS_ISEL);
+ GET_FEATURE2(PPC2_BCTAR_ISA207, QEMU_PPC_FEATURE2_HAS_TAR);
+ GET_FEATURE2((PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 |
+ PPC2_ISA207S), QEMU_PPC_FEATURE2_ARCH_2_07 |
+ QEMU_PPC_FEATURE2_VEC_CRYPTO);
+ GET_FEATURE2(PPC2_ISA300, QEMU_PPC_FEATURE2_ARCH_3_00 |
+ QEMU_PPC_FEATURE2_DARN | QEMU_PPC_FEATURE2_HAS_IEEE128);
+ GET_FEATURE2(PPC2_ISA310, QEMU_PPC_FEATURE2_ARCH_3_1 |
+ QEMU_PPC_FEATURE2_MMA);
+
+#undef GET_FEATURE
+#undef GET_FEATURE2
+
+ return features;
+}
--
2.43.0
