On Sun, 2025-07-20 at 23:26 +0200, Cédric Le Goater wrote: > On 5/16/25 03:29, Nicholas Piggin wrote: > > On Fri May 16, 2025 at 1:36 AM AEST, Cédric Le Goater wrote: > > > On 5/12/25 05:10, Nicholas Piggin wrote: > > > > These changes gets the powernv xive2 to the point it is able to run > > > > PowerVM with good stability. > > > > > > > > * Various bug fixes around lost interrupts particularly. > > > > * Major group interrupt work, in particular around redistributing > > > > interrupts. Upstream group support is not in a complete or usable > > > > state as it is. > > > > * Significant context push/pull improvements, particularly pool and > > > > phys context handling was quite incomplete beyond trivial OPAL > > > > case that pushes at boot. > > > > * Improved tracing and checking for unimp and guest error situations. > > > > * Various other missing feature support. > > > > > > > > The ordering and grouping of patches in the series is not perfect, > > > > because it had been an ongoing development, and PowerVM only started > > > > to become stable toward the end. I did try to rearrange and improve > > > > things, but some were not worth rebasing cost (e.g., some of the > > > > pool/phys pull redistribution patches should have ideally been squashed > > > > or moved together), so please bear that in mind. Suggestions for > > > > further rearranging the series are fine, but I might just find they are > > > > too much effort to be worthwhile. > > > > > > > > Thanks, > > > > Nick > > > > > > > > Glenn Miles (12): > > > > ppc/xive2: Fix calculation of END queue sizes > > > > ppc/xive2: Use fair irq target search algorithm > > > > ppc/xive2: Fix irq preempted by lower priority group irq > > > > ppc/xive2: Fix treatment of PIPR in CPPR update > > > > pnv/xive2: Support ESB Escalation > > > > ppc/xive2: add interrupt priority configuration flags > > > > ppc/xive2: Support redistribution of group interrupts > > > > ppc/xive: Add more interrupt notification tracing > > > > ppc/xive2: Improve pool regs variable name > > > > ppc/xive2: Implement "Ack OS IRQ to even report line" TIMA op > > > > ppc/xive2: Redistribute group interrupt precluded by CPPR update > > > > ppc/xive2: redistribute irqs for pool and phys ctx pull > > > > > > > > Michael Kowal (4): > > > > ppc/xive2: Remote VSDs need to match on forwarding address > > > > ppc/xive2: Reset Generation Flipped bit on END Cache Watch > > > > pnv/xive2: Print value in invalid register write logging > > > > pnv/xive2: Permit valid writes to VC/PC Flush Control registers > > > > > > > > Nicholas Piggin (34): > > > > ppc/xive: Fix xive trace event output > > > > ppc/xive: Report access size in XIVE TM operation error logs > > > > ppc/xive2: fix context push calculation of IPB priority > > > > ppc/xive: Fix PHYS NSR ring matching > > > > ppc/xive2: Do not present group interrupt on OS-push if precluded by > > > > CPPR > > > > ppc/xive2: Set CPPR delivery should account for group priority > > > > ppc/xive: tctx_notify should clear the precluded interrupt > > > > ppc/xive: Explicitly zero NSR after accepting > > > > ppc/xive: Move NSR decoding into helper functions > > > > ppc/xive: Fix pulling pool and phys contexts > > > > pnv/xive2: VC_ENDC_WATCH_SPEC regs should read back WATCH_FULL > > > > ppc/xive: Change presenter .match_nvt to match not present > > > > ppc/xive2: Redistribute group interrupt preempted by higher priority > > > > interrupt > > > > ppc/xive: Add xive_tctx_pipr_present() to present new interrupt > > > > ppc/xive: Fix high prio group interrupt being preempted by low prio > > > > VP > > > > ppc/xive: Split xive recompute from IPB function > > > > ppc/xive: tctx signaling registers rework > > > > ppc/xive: tctx_accept only lower irq line if an interrupt was > > > > presented > > > > ppc/xive: Add xive_tctx_pipr_set() helper function > > > > ppc/xive2: split tctx presentation processing from set CPPR > > > > ppc/xive2: Consolidate presentation processing in context push > > > > ppc/xive2: Avoid needless interrupt re-check on CPPR set > > > > ppc/xive: Assert group interrupts were redistributed > > > > ppc/xive2: implement NVP context save restore for POOL ring > > > > ppc/xive2: Prevent pulling of pool context losing phys interrupt > > > > ppc/xive: Redistribute phys after pulling of pool context > > > > ppc/xive: Check TIMA operations validity > > > > ppc/xive2: Implement pool context push TIMA op > > > > ppc/xive2: redistribute group interrupts on context push > > > > ppc/xive2: Implement set_os_pending TIMA op > > > > ppc/xive2: Implement POOL LGS push TIMA op > > > > ppc/xive2: Implement PHYS ring VP push TIMA op > > > > ppc/xive: Split need_resend into restore_nvp > > > > ppc/xive2: Enable lower level contexts on VP push > > > > > > > > hw/intc/pnv_xive.c | 16 +- > > > > hw/intc/pnv_xive2.c | 139 +++++-- > > > > hw/intc/pnv_xive2_regs.h | 1 + > > > > hw/intc/spapr_xive.c | 18 +- > > > > hw/intc/trace-events | 12 +- > > > > hw/intc/xive.c | 555 ++++++++++++++++++---------- > > > > hw/intc/xive2.c | 717 > > > > +++++++++++++++++++++++++++--------- > > > > hw/ppc/pnv.c | 48 +-- > > > > hw/ppc/spapr.c | 21 +- > > > > include/hw/ppc/xive.h | 66 +++- > > > > include/hw/ppc/xive2.h | 22 +- > > > > include/hw/ppc/xive2_regs.h | 22 +- > > > > 12 files changed, 1145 insertions(+), 492 deletions(-) > > > > > > > > > > I am impressed :) and glad that you are still taking care of XIVE. > > > > > > I suggest adding new names under the XIVE entry in the MAINTAINERS file. > > > > Yeah it's good to see. They are building a lot more cool stuff with > > powernv at the moment, hopefully almost all should get upstreamed > > eventually. > > > > I will try to convince them to add MAINTAINER entries :) > > > > Thanks, > > Nick > > > > This is a major update for XIVE and, since I am not sure anyone > is going to send a PR for QEMU 10.1, I am volunteering to do > it again on monday, once and only for these fixes. > > We should clarify in the next cycle who is charge of ppc. IMO, > If we don't have maintainers, we should orphan all non-pseries > PPC components. I can send a maintainer update on this as soon > as the QEMU 10.2 cycle opens. > > > Thanks, > > C. >
Cédric, Thanks for doing the PR for these XIVE changes! It sounds like if we want to continue having our XIVE changes upstreamed we will need someone on our IBM QEMU development team to volunteer as a maintainer. Does becoming a maintainer still require physically attending a key signing party at KVM Forum? Thanks, Glenn
