On 4/17/25 7:52 AM, Jim Shu wrote:
Add CSRs for 3 WG extensions: Smwg, Smwgd, and Sswg.
Signed-off-by: Jim Shu <jim....@sifive.com>
---
Reviewed-by: Daniel Henrique Barboza <dbarb...@ventanamicro.com>
target/riscv/cpu_bits.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
index a30317c617..7705c6995e 100644
--- a/target/riscv/cpu_bits.h
+++ b/target/riscv/cpu_bits.h
@@ -408,6 +408,11 @@
#define CSR_DPC 0x7b1
#define CSR_DSCRATCH 0x7b2
+/* RISC-V WorldGuard */
+#define CSR_MLWID 0x390
+#define CSR_SLWID 0x190
+#define CSR_MWIDDELEG 0x748
+
/* Performance Counters */
#define CSR_MHPMCOUNTER3 0xb03
#define CSR_MHPMCOUNTER4 0xb04
