From: "Edgar E. Iglesias" <edgar.igles...@amd.com> Break out raise_divzero(). No functional change.
Signed-off-by: Edgar E. Iglesias <edgar.igles...@amd.com> --- target/microblaze/op_helper.c | 30 ++++++++++++++---------------- 1 file changed, 14 insertions(+), 16 deletions(-) diff --git a/target/microblaze/op_helper.c b/target/microblaze/op_helper.c index 092977b3e1..d9444aee29 100644 --- a/target/microblaze/op_helper.c +++ b/target/microblaze/op_helper.c @@ -69,27 +69,24 @@ void helper_raise_exception(CPUMBState *env, uint32_t index) cpu_loop_exit(cs); } -static bool check_divz(CPUMBState *env, uint32_t divisor, uintptr_t pc) +/* Raises ESR_EC_DIVZERO if exceptions are enabled. */ +static void raise_divzero(CPUMBState *env, uint32_t esr, uintptr_t pc) { - if (unlikely(divisor == 0)) { - env->msr |= MSR_DZ; - - if ((env->msr & MSR_EE) && - env_archcpu(env)->cfg.div_zero_exception) { - CPUState *cs = env_cpu(env); - - env->esr = ESR_EC_DIVZERO; - cs->exception_index = EXCP_HW_EXCP; - cpu_loop_exit_restore(cs, pc); - } - return false; + env->msr |= MSR_DZ; + + if ((env->msr & MSR_EE) && env_archcpu(env)->cfg.div_zero_exception) { + CPUState *cs = env_cpu(env); + + env->esr = esr; + cs->exception_index = EXCP_HW_EXCP; + cpu_loop_exit_restore(cs, pc); } - return true; } uint32_t helper_divs(CPUMBState *env, uint32_t ra, uint32_t rb) { - if (!check_divz(env, ra, GETPC())) { + if (!ra) { + raise_divzero(env, ESR_EC_DIVZERO, GETPC()); return 0; } return (int32_t)rb / (int32_t)ra; @@ -97,7 +94,8 @@ uint32_t helper_divs(CPUMBState *env, uint32_t ra, uint32_t rb) uint32_t helper_divu(CPUMBState *env, uint32_t ra, uint32_t rb) { - if (!check_divz(env, ra, GETPC())) { + if (!ra) { + raise_divzero(env, ESR_EC_DIVZERO, GETPC()); return 0; } return rb / ra; -- 2.43.0