From: Vacha Bhavsar <vacha.bhav...@oss.qualcomm.com>
In the code for allowing the gdbstub to set the value of an AArch64
FP/SIMD register, we weren't accounting for target_big_endian()
being true. This meant that for aarch64_be-linux-user we would
set the two halves of the FP register the wrong way around.
The much more common case of a little-endian guest is not affected;
nor are big-endian hosts.
Correct the handling of this case.
Cc: qemu-sta...@nongnu.org
Signed-off-by: Vacha Bhavsar <vacha.bhav...@oss.qualcomm.com>
Message-id: 20250722173736.2332529-2-vacha.bhav...@oss.qualcomm.com
[PMM: added comment, expanded commit message, fixed missing space]
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
(cherry picked from commit 35cca0f95ff5345f54c11d116efc8940a0dab8aa)
(Mjt: s/target_big_endian/target_words_bigendian/ due to missing
v10.0.0-277-gb939b8e42a "exec: Rename target_words_bigendian() ->
target_big_endian()")
Signed-off-by: Michael Tokarev <m...@tls.msk.ru>
diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c
index 1a4dbec567..d4d808a49b 100644
--- a/target/arm/gdbstub64.c
+++ b/target/arm/gdbstub64.c
@@ -111,8 +111,22 @@ int aarch64_gdb_set_fpu_reg(CPUState *cs, uint8_t *buf,
int reg)
/* 128 bit FP register */
{
uint64_t *q = aa64_vfp_qreg(env, reg);
- q[0] = ldq_le_p(buf);
- q[1] = ldq_le_p(buf + 8);
+
+ /*
+ * On the wire these are target-endian 128 bit values.
+ * In the CPU state these are host-order uint64_t values
+ * with the least-significant one first. This means they're
+ * the other way around for target_words_bigendian() (which is
+ * only true for us for aarch64_be-linux-user).
+ */
+ if (target_words_bigendian()) {
+ q[1] = ldq_p(buf);
+ q[0] = ldq_p(buf + 8);
+ } else{
+ q[0] = ldq_p(buf);
+ q[1] = ldq_p(buf + 8);
+ }
+
return 16;
}
case 32:
--
2.47.2
