On 3/7/2025 1:46 PM, ltaylorsimp...@gmail.com wrote:
-----Original Message----- From: Brian Cain <brian.c...@oss.qualcomm.com> Sent: Friday, February 28, 2025 11:26 PM To: qemu-devel@nongnu.org Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; quic_mlie...@quicinc.com; ltaylorsimp...@gmail.com; alex.ben...@linaro.org; quic_mbur...@quicinc.com; sidn...@quicinc.com; Brian Cain <bc...@quicinc.com> Subject: [PATCH 15/38] target/hexagon: Add handlers for guest/sysreg r/w From: Brian Cain <bc...@quicinc.com> This commit provides handlers to generate TCG for guest and system register reads and writes. They will be leveraged by a future commit. Signed-off-by: Brian Cain <brian.c...@oss.qualcomm.com> --- target/hexagon/genptr.c | 159 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 159 insertions(+) diff --git a/target/hexagon/genptr.c b/target/hexagon/genptr.c index 2c5e15cfcf..488d0b4b97 100644 --- a/target/hexagon/genptr.c +++ b/target/hexagon/genptr.c +G_GNUC_UNUSED +static void gen_read_greg(TCGv dst, int reg_num) { + gen_helper_greg_read(dst, tcg_env, tcg_constant_tl(reg_num)); } + +G_GNUC_UNUSED +static void gen_read_greg_pair(TCGv_i64 dst, int reg_num) { + gen_helper_greg_read_pair(dst, tcg_env, tcg_constant_tl(reg_num)); +} #endif + +This will work, but G'regs 0:3 could be read more efficiently by reading from TCGv hex_greg rather than calling the helper.
Some guest registers have special behavior, so we pessimistically generate helper calls for all of them. Should we revisit this for v3 in order to get optimal codegen for the simple registers, or can we revisit it after the series lands?
Otherwise Reviewed-by: Taylor Simpson <ltaylorsimp...@gmail.com>
