Re: [PATCH 24/39] target/hexagon: Add exec-start-addr prop

[Brian Cain]

On 3/17/2025 3:03 PM, ltaylorsimp...@gmail.com wrote:

-----Original Message-----
From: Brian Cain <brian.c...@oss.qualcomm.com>
Sent: Friday, February 28, 2025 11:29 PM
To: qemu-devel@nongnu.org
Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org;
phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng;
quic_mlie...@quicinc.com; ltaylorsimp...@gmail.com;
alex.ben...@linaro.org; quic_mbur...@quicinc.com;
sidn...@quicinc.com; Brian Cain <bc...@quicinc.com>
Subject: [PATCH 24/39] target/hexagon: Add exec-start-addr prop

From: Brian Cain <bc...@quicinc.com>

Signed-off-by: Brian Cain <brian.c...@oss.qualcomm.com>
---
  target/hexagon/cpu.h | 1 +
  target/hexagon/cpu.c | 7 ++-----
  2 files changed, 3 insertions(+), 5 deletions(-)

diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h index
baa48ec051..4667a1f748 100644
--- a/target/hexagon/cpu.h
+++ b/target/hexagon/cpu.h
@@ -194,6 +194,7 @@ struct ArchCPU {
      uint32_t num_tlbs;
      uint32_t l2vic_base_addr;
      uint32_t hvx_contexts;
+    uint32_t boot_addr;
  #endif
  };

diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index
9f4cfd03c4..7afdcbf9d0 100644
--- a/target/hexagon/cpu.c
+++ b/target/hexagon/cpu.c
@@ -66,6 +66,7 @@ static const Property hexagon_cpu_properties[] = {
      DEFINE_PROP_UINT32("l2vic-base-addr", HexagonCPU, l2vic_base_addr,
          0xffffffffULL),
      DEFINE_PROP_UINT32("hvx-contexts", HexagonCPU, hvx_contexts, 0),
+    DEFINE_PROP_UINT32("exec-start-addr", HexagonCPU, boot_addr,
+ 0xffffffffULL),

Don't put a ULL value for a UINT32 property.

Happy to fix this for v3.

Ditto for l2vic-base-addr above (must've missed it when it came in).

  #endif
      DEFINE_PROP_BOOL("lldb-compat", HexagonCPU, lldb_compat, false),
      DEFINE_PROP_UNSIGNED("lldb-stack-adjust", HexagonCPU,
lldb_stack_adjust, 0, @@ -362,8 +363,6 @@ static void
hexagon_cpu_reset_hold(Object *obj, ResetType type)
      mmu_reset(env);
      arch_set_system_reg(env, HEX_SREG_HTID, cs->cpu_index);
      hexagon_cpu_soft_reset(env);
-    memset(env->t_sreg, 0, sizeof(target_ulong) * NUM_SREGS);
-    memset(env->greg, 0, sizeof(target_ulong) * NUM_GREGS);

Why are you removing these here?

      env->threadId = cs->cpu_index;
      env->tlb_lock_state = HEX_LOCK_UNLOCKED;
      env->k0_lock_state = HEX_LOCK_UNLOCKED; @@ -372,6 +371,7 @@ static
void hexagon_cpu_reset_hold(Object *obj, ResetType type)
      env->next_PC = 0;
      env->wait_next_pc = 0;
      env->cause_code = -1;
+    arch_set_thread_reg(env, HEX_REG_PC, cpu->boot_addr);
  #endif
  }

@@ -414,9 +414,6 @@ static void hexagon_cpu_realize(DeviceState *dev,
Error **errp)  #ifndef CONFIG_USER_ONLY
      CPUHexagonState *env = cpu_env(cs);
      hex_mmu_realize(env);
-#endif
-    cpu_reset(cs);
-#ifndef CONFIG_USER_ONLY

Why are you removing these here?

Fixed in v2.

      if (cs->cpu_index == 0) {
          env->g_sreg = g_new0(target_ulong, NUM_SREGS);
          env->g_pcycle_base = g_malloc0(sizeof(*env->g_pcycle_base));
--
2.34.1