From: Brian Cain <bc...@quicinc.com> Reviewed-by: Taylor Simpson <ltaylorsimp...@gmail.com> Signed-off-by: Brian Cain <brian.c...@oss.qualcomm.com> --- target/hexagon/cpu_helper.c | 33 ++++++++++++++++++++++++++++++++- 1 file changed, 32 insertions(+), 1 deletion(-)
diff --git a/target/hexagon/cpu_helper.c b/target/hexagon/cpu_helper.c index 1a1520214e..4732a698b4 100644 --- a/target/hexagon/cpu_helper.c +++ b/target/hexagon/cpu_helper.c @@ -39,7 +39,38 @@ uint32_t hexagon_get_pmu_counter(CPUHexagonState *cur_env, int index) uint32_t arch_get_system_reg(CPUHexagonState *env, uint32_t reg) { - g_assert_not_reached(); + if (reg == HEX_SREG_PCYCLELO) { + return hexagon_get_sys_pcycle_count_low(env); + } else if (reg == HEX_SREG_PCYCLEHI) { + return hexagon_get_sys_pcycle_count_high(env); + } + + g_assert(reg < NUM_SREGS); + if (reg < HEX_SREG_GLB_START) { + return env->t_sreg[reg]; + } else { +#ifndef CONFIG_USER_ONLY + HexagonCPU *cpu = env_archcpu(env); + return cpu->globalregs ? hexagon_globalreg_read(cpu, reg) : 0; +#else + return 0; +#endif + } +} + +void arch_set_system_reg(CPUHexagonState *env, uint32_t reg, uint32_t val) +{ + g_assert(reg < NUM_SREGS); + if (reg < HEX_SREG_GLB_START) { + env->t_sreg[reg] = val; + } else { +#ifndef CONFIG_USER_ONLY + HexagonCPU *cpu = env_archcpu(env); + if (cpu->globalregs) { + hexagon_globalreg_write(cpu, reg, val); + } +#endif + } } uint64_t hexagon_get_sys_pcycle_count(CPUHexagonState *env) -- 2.34.1