> -----Original Message----- > From: Eric Auger <eric.au...@redhat.com> > Sent: 05 September 2025 09:43 > To: qemu-...@nongnu.org; qemu-devel@nongnu.org; Shameer Kolothum > <skolothum...@nvidia.com> > Cc: peter.mayd...@linaro.org; Jason Gunthorpe <j...@nvidia.com>; Nicolin > Chen <nicol...@nvidia.com>; ddut...@redhat.com; berra...@redhat.com; > Nathan Chen <nath...@nvidia.com>; Matt Ochs <mo...@nvidia.com>; > smost...@google.com; linux...@huawei.com; wangzh...@hisilicon.com; > jiangkun...@huawei.com; jonathan.came...@huawei.com; > zhangfei....@linaro.org; zhenzhong.d...@intel.com; > shameerkolot...@gmail.com > Subject: Re: [RFC PATCH v3 06/15] hw/arm/smmuv3-accel: Restrict > accelerated SMMUv3 to vfio-pci endpoints with iommufd > > External email: Use caution opening links or attachments > > > On 7/14/25 5:59 PM, Shameer Kolothum wrote: > > Accelerated SMMUv3 is only useful when the device can take advantage > > of the host's SMMUv3 in nested mode. To keep things simple and > > correct, we only allow this feature for vfio-pci endpoint devices that > > use the iommufd backend. We also allow non-endpoint emulated devices > > like PCI bridges and root ports, so that users can plug in these vfio-pci > devices. > > > > Another reason for this limit is to avoid problems with IOTLB > > invalidations. Some commands (e.g., CMD_TLBI_NH_ASID) lack an > > associated SID, making it difficult to trace the originating device. > > If we allowed emulated endpoint devices, QEMU would have to invalidate > > both its own software IOTLB and the host's hardware IOTLB, which could > > slow things down. > > > > Since vfio-pci devices in nested mode rely on the host SMMUv3's nested > > translation (S1+S2), their get_address_space() callback must return > > the system address space to enable correct S2 mappings of guest RAM. > > > > So in short: > > - vfio-pci devices return the system address space > > - bridges and root ports return the IOMMU address space > > > > Note: On ARM, MSI doorbell addresses are also translated via SMMUv3. > > Hence, if a vfio-pci device is behind the SMMuv3 with translation > > enabled, it must return the IOMMU address space for MSI. Support for > > this will be added in a follow-up patch. > It sounds antithetical to what is said above: > > "vfio-pci devices return the system address space"
This is not related to this patch per se. I only added the note to highlight that address space for MSI translation required in nested case is addressed later in this series(patch #11). I can remove this note if it is not helping and causing confusion 😊. Thanks, Shameer
