> On 4. Oct 2025, at 08:34, Pranith Kumar <[email protected]> wrote:
>
> Hi Richard and Alex,
>
> I am trying to implement efficient x86 guest on ARM64 host
> virtualization where the host has FEAT_LRCPC2 instructions. If I
> translate every x86 load to LDAPR and every x86 store to STLR, it will
> meet the memory consistency requirements.
Hello,
If you’re targeting Apple chips, note that RCpc is really slow on those
as they expect you to use the hardware TSO mode instead.
But to get TSO mode on those you’ll need to use HVF…
> The necessary condition for using these RCpc instructions is the
> alignment. The manual states that alignment fault will be raised if:
>
> * Not all bytes of the memory access lie within a 16-byte quantity
> aligned to 16 bytes, and
> * The value of SCTLR_ELx.nAA applicable to the current Exception level is 0.
>
> How does TCG check for alignment? How do I check if the guest memory
> access is within the 16-byte alignment? Will alignment fault be raised
> if it is not?
The hardware will raise an alignment fault in that case. Other emulators
then do backpatching to a barrier-reliant sequence in that case.
> Any pointers are greatly appreciated!
>
> Thank you,
> --
> Pranith
>
