Re: [PATCH 00/13] target/riscv: Centralize MO_TE uses in a pair of helpers

[Alistair Francis]

On Wed, Oct 15, 2025 at 5:45 AM Philippe Mathieu-Daudé
<phi...@linaro.org> wrote:
>
> Hi Alistair,
>
> On 10/10/25 17:50, Philippe Mathieu-Daudé wrote:
> > In preparation of having RISC-V cores changing their endianness
> > at runtime, centralize the MO_TE uses to a pair of methods.
> >
> > Except the 128-bit LD/ST change (first patch), no further
> > functional changes intended.
> >
> > Philippe Mathieu-Daudé (13):
> >    target/riscv: Really use little endianness for 128-bit loads/stores
>
> Are you OK to queue reviewed patches 2-13 (independent of patch #1)?

Yep

Thanks!

Applied to riscv-to-apply.next

Alistair

>
> >    target/riscv: Explode MO_TExx -> MO_TE | MO_xx
> >    target/riscv: Conceal MO_TE within gen_amo()
> >    target/riscv: Conceal MO_TE within gen_inc()
> >    target/riscv: Conceal MO_TE within gen_load() / gen_store()
> >    target/riscv: Conceal MO_TE within gen_load_idx() / gen_store_idx()
> >    target/riscv: Conceal MO_TE within gen_fload_idx() / gen_fstore_idx()
> >    target/riscv: Conceal MO_TE within gen_storepair_tl()
> >    target/riscv: Conceal MO_TE within gen_cmpxchg*()
> >    target/riscv: Conceal MO_TE|MO_ALIGN within gen_lr() / gen_sc()
> >    target/riscv: Factor MemOp variable out when MO_TE is set
> >    target/riscv: Introduce mo_endian() helper
> >    target/riscv: Introduce mo_endian_env() helper
> Regards,
> Phil.
>