mseccfg is defined in version 20250508 of the privileged specification to be 64 bits in size. Update relevant function arguments.
Signed-off-by: Anton Johansson <[email protected]> --- target/riscv/cpu.h | 2 +- target/riscv/pmp.h | 4 ++-- target/riscv/pmp.c | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index f8ab66adb3..4c90b8b035 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -457,7 +457,7 @@ struct CPUArchState { /* physical memory protection */ pmp_table_t pmp_state; - target_ulong mseccfg; + uint64_t mseccfg; /* trigger module */ uint16_t mcontext; diff --git a/target/riscv/pmp.h b/target/riscv/pmp.h index 271cf24169..e322904637 100644 --- a/target/riscv/pmp.h +++ b/target/riscv/pmp.h @@ -69,8 +69,8 @@ void pmpcfg_csr_write(CPURISCVState *env, uint32_t reg_index, target_ulong val); target_ulong pmpcfg_csr_read(CPURISCVState *env, uint32_t reg_index); -void mseccfg_csr_write(CPURISCVState *env, target_ulong val); -target_ulong mseccfg_csr_read(CPURISCVState *env); +void mseccfg_csr_write(CPURISCVState *env, uint64_t val); +uint64_t mseccfg_csr_read(CPURISCVState *env); void pmpaddr_csr_write(CPURISCVState *env, uint32_t addr_index, target_ulong val); diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c index 72f1372a49..85199c7387 100644 --- a/target/riscv/pmp.c +++ b/target/riscv/pmp.c @@ -597,7 +597,7 @@ target_ulong pmpaddr_csr_read(CPURISCVState *env, uint32_t addr_index) /* * Handle a write to a mseccfg CSR */ -void mseccfg_csr_write(CPURISCVState *env, target_ulong val) +void mseccfg_csr_write(CPURISCVState *env, uint64_t val) { int i; uint64_t mask = MSECCFG_MMWP | MSECCFG_MML; @@ -643,7 +643,7 @@ void mseccfg_csr_write(CPURISCVState *env, target_ulong val) /* * Handle a read from a mseccfg CSR */ -target_ulong mseccfg_csr_read(CPURISCVState *env) +uint64_t mseccfg_csr_read(CPURISCVState *env) { trace_mseccfg_csr_read(env->mhartid, env->mseccfg); return env->mseccfg; -- 2.51.0
