On Wed, Oct 15, 2025 at 11:28 PM Anton Johansson via <[email protected]> wrote: > > Signed-off-by: Anton Johansson <[email protected]>
Reviewed-by: Alistair Francis <[email protected]> Alistair > --- > hw/riscv/riscv-iommu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c > index 450285a850..9ac37efc70 100644 > --- a/hw/riscv/riscv-iommu.c > +++ b/hw/riscv/riscv-iommu.c > @@ -2449,7 +2449,7 @@ static void riscv_iommu_instance_init(Object *obj) > > /* Report QEMU target physical address space limits */ > s->cap = set_field(s->cap, RISCV_IOMMU_CAP_PAS, > - TARGET_PHYS_ADDR_SPACE_BITS); > + target_phys_addr_space_bits()); > > /* TODO: method to report supported PID bits */ > s->pid_bits = 8; /* restricted to size of MemTxAttrs.pid */ > > -- > 2.51.0 > >
