On Tue, 8 Jul 2025 at 12:52, Peter Maydell <[email protected]> wrote: > > The GICD_TYPER2 GICv3 distributor register is one that is added > for GICv4.1; previously this was architected as a RES0 location. > Our TCG GIC doesn't implement GICv4.1, but for KVM the kernel > might support it. > > This patchset: > * makes GICD_TYPER0 reads not trigger a bad-read trace > event on the TCG GICv3, for the benefit of GICv4.1-aware > guest code > * migrates the GICD_TYPER2 register value on a KVM GIC, > so that a mismatch between source and destination > can be caught by the destination kernel > > Note that I have only very lightly tested this, on a > host which (I believe) doesn't have a GICv4.1. > > Changes v1->v2: > * fix comment missing bracket > * fix reset handling so this works on GICv4.1 hosts > * move get/put code to be with the other GICD regs > * new patch 3 to drop a barely-used debug printf macro
I never applied this, I think because I was concerned about not having tested patch 2 very much. But patches 1 and 3 are definitely simple and safe, so I'm going to pick those up. Patch 2 is still probably a good idea, but IDK if I'm going to get round to testing it, especially since I don't have a GICv4.1 host to hand... -- PMM
