The following changes since commit d6dfd8d40cebebc3378d379cd28879e0345fbf91:
Merge tag 'pull-target-arm-20250926' of https://gitlab.com/pm215/qemu into staging (2025-09-26 13:27:01 -0700) are available in the Git repository at: https://gitlab.com/harshpb/qemu.git tags/pull-ppc-for-20250928-20250929 for you to fetch changes up to 6c51df580d2a64b4e1ef7bdbffeb3615ffe25d43: target/ppc: use MAKE_64BIT_MASK for mcrfs exception clear mask (2025-09-28 23:50:36 +0530) ---------------------------------------------------------------- ppc queue for 20250928 * Support for PowerNV11 and PPE42 CPU/Machines. * Deprecation of Power8E and Power8NVL * Decodetree patches for some floating-point instructions * Minor bug fixes, improvements in ppc/spapr/xive/xics. Qemu CI: https://gitlab.com/harshpb/qemu/-/pipelines/2068351418 ---------------------------------------------------------------- Aditya Gupta (10): ppc/pnv: Introduce Pnv11Chip ppc/pnv: Introduce Power11 PowerNV machine ppc/pnv: Add PnvChipClass handler to get reference to interrupt controller ppc/pnv: Add XIVE2 controller to Power11 ppc/pnv: Add PHB5 PCIe Host bridge to Power11 ppc/pnv: Add ChipTOD model for Power11 tests/powernv: Switch to buildroot images instead of op-build tests/powernv: Add PowerNV test for Power11 target/ppc: Introduce macro for deprecating PowerPC CPUs target/ppc: Deprecate Power8E and Power8NVL Chinmay Rath (4): target/ppc: Move floating-point rounding and conversion instructions to decodetree. target/ppc: Move floating-point compare instructions to decodetree. target/ppc: Move floating-point move instructions to decodetree. target/ppc: Move remaining floating-point move instructions to decodetree. Denis Sergeev (1): target/ppc: use MAKE_64BIT_MASK for mcrfs exception clear mask Fabian Vogt (1): hw/intc/xics: Add missing call to register vmstate_icp_server Gautam Menghani (1): ppc/xive2: Fix integer overflow warning in xive2_redistribute() Glenn Miles (9): target/ppc: IBM PPE42 general regs and flags target/ppc: Add IBM PPE42 family of processors target/ppc: IBM PPE42 exception flags and regs target/ppc: Add IBM PPE42 exception model target/ppc: Support for IBM PPE42 MMU target/ppc: Add IBM PPE42 special instructions hw/ppc: Support for an IBM PPE42 CPU decrementer hw/ppc: Add a test machine for the IBM PPE42 CPU tests/functional: Add test for IBM PPE42 instructions Harsh Prateek Bora (1): ppc/spapr: init lrdr-capapcity phys with ram size if maxmem not provided MAINTAINERS | 7 + docs/about/deprecated.rst | 9 + docs/system/ppc/powernv.rst | 9 +- include/hw/ppc/pnv.h | 38 ++ include/hw/ppc/pnv_chip.h | 8 + include/hw/ppc/pnv_chiptod.h | 2 + include/hw/ppc/pnv_xscom.h | 49 +++ include/hw/ppc/ppc.h | 1 + target/ppc/cpu-models.h | 4 + target/ppc/cpu.h | 76 +++- target/ppc/helper.h | 38 +- target/ppc/insn32.decode | 106 +++++- hw/intc/pnv_xive2.c | 4 +- hw/intc/xics.c | 2 + hw/intc/xive2.c | 45 ++- hw/ppc/pnv.c | 560 ++++++++++++++++++++++++++++++ hw/ppc/pnv_chiptod.c | 59 ++++ hw/ppc/pnv_core.c | 17 + hw/ppc/ppc_booke.c | 7 +- hw/ppc/ppe42_machine.c | 101 ++++++ hw/ppc/spapr.c | 11 +- target/ppc/cpu-models.c | 27 +- target/ppc/cpu_init.c | 251 +++++++++++--- target/ppc/excp_helper.c | 163 +++++++++ target/ppc/fpu_helper.c | 38 +- target/ppc/helper_regs.c | 45 ++- target/ppc/tcg-excp_helper.c | 12 + target/ppc/translate.c | 35 +- target/ppc/translate/fp-impl.c.inc | 291 ++++++---------- target/ppc/translate/fp-ops.c.inc | 30 -- target/ppc/translate/ppe-impl.c.inc | 609 +++++++++++++++++++++++++++++++++ hw/ppc/Kconfig | 5 + hw/ppc/meson.build | 2 + tests/functional/ppc/meson.build | 1 + tests/functional/ppc/test_ppe42.py | 79 +++++ tests/functional/ppc64/test_powernv.py | 34 +- 36 files changed, 2407 insertions(+), 368 deletions(-) create mode 100644 hw/ppc/ppe42_machine.c create mode 100644 target/ppc/translate/ppe-impl.c.inc create mode 100644 tests/functional/ppc/test_ppe42.py
