On Tue, Sep 23, 2025 at 7:08 PM Max Chou <[email protected]> wrote: > > According to the RISC-V unprivileged specification, the VLEN should be greater > or equal to the ELEN. This commit modifies the minimum VLEN based on the > vector > extensions and introduces a check rule for VLEN and ELEN. > > Extension Minimum VLEN > * V 128 > * Zve64[d|f|x] 64 > * Zve32[f|x] 32 > > Signed-off-by: Max Chou <[email protected]>
Reviewed-by: Alistair Francis <[email protected]> Alistair > --- > target/riscv/tcg/tcg-cpu.c | 19 +++++++++++++++++-- > 1 file changed, 17 insertions(+), 2 deletions(-) > > diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c > index a6f60f55ceb..02d99bb0ae9 100644 > --- a/target/riscv/tcg/tcg-cpu.c > +++ b/target/riscv/tcg/tcg-cpu.c > @@ -416,12 +416,21 @@ static void riscv_cpu_validate_misa_priv(CPURISCVState > *env, Error **errp) > static void riscv_cpu_validate_v(CPURISCVState *env, RISCVCPUConfig *cfg, > Error **errp) > { > + uint32_t min_vlen; > uint32_t vlen = cfg->vlenb << 3; > > - if (vlen > RV_VLEN_MAX || vlen < 128) { > + if (riscv_has_ext(env, RVV)) { > + min_vlen = 128; > + } else if (cfg->ext_zve64x) { > + min_vlen = 64; > + } else if (cfg->ext_zve32x) { > + min_vlen = 32; > + } > + > + if (vlen > RV_VLEN_MAX || vlen < min_vlen) { > error_setg(errp, > "Vector extension implementation only supports VLEN " > - "in the range [128, %d]", RV_VLEN_MAX); > + "in the range [%d, %d]", min_vlen, RV_VLEN_MAX); > return; > } > > @@ -431,6 +440,12 @@ static void riscv_cpu_validate_v(CPURISCVState *env, > RISCVCPUConfig *cfg, > "in the range [8, 64]"); > return; > } > + > + if (vlen < cfg->elen) { > + error_setg(errp, "Vector extension implementation requires VLEN " > + "to be greater than or equal to ELEN"); > + return; > + } > } > > static void riscv_cpu_disable_priv_spec_isa_exts(RISCVCPU *cpu) > -- > 2.43.0 > >
