On Thu, 16 Oct 2025 at 12:13, Salil Mehta <[email protected]> wrote: > > Hi Peter, > > > Above changes assume that the driver's configured value of the > > > ICC_CTLR_EL1 system register is the same as the default value. I've > > > verified that this currently the case. However, it safe to assume that > > > this will remain true in the future as well? > > > > I don't understand what you mean here. We read the kernel's ICC_CTLR_EL1 > > at VM startup, when we know it will be the reset value, because we haven't > > run any VCPUs yet. > > > System register fetches its value from ICH_VMCR_EL2 and ICH_VTR_EL2. > In specific, EOIMode, PMHE and CBPR fields of ICC_CTLR_EL1 are from > the VMCR register. Later gets configured when driver gets loaded and again > re-configured in context to each CPU ON request(via in-kernel CPU Hotplug > state machine; CPUHP_AP_IRQ_GIC_STARTING). This configures the VMCR > again and again. Although, the value as of now is same. > > You might want to check gic_cpu_sys_reg_init() in irq-gic-v3.c
I'm afraid I still don't understand what you mean here. This is all the guest writing to the GIC registers as it starts up, right? That has no influence at all on what the reset value of the emulated hardware should be. (This is the same as on real hardware: it doesn't matter what the OS writes to registers when it is running; when the hardware resets it resets to the reset value.) We want to know what value the kernel gives to this register when the GIC is in a freshly reset state when no guest code has run. That should be the value that it has here, when we read it on realize. thanks -- PMM
