On 2025-10-16 19:58:32+0200, Ilya Leoshkevich wrote: > Indirect branches to addresses taken from registers go through address > generation, e.g., for BRANCH ON CONDITION Principles of Operation says: > > In the RR format, the contents of general register R2 are used to > generate the branch address > > QEMU uses r2_nz handler for the respective register operands. Currently > it does not zero out extra bits in 24- and 31-bit addressing modes as > required by address generation. The very frequently used > s390x_tr_init_disas_context() function has a workaround for this, > but the code for saving an old PSW during an interrupt does not. > > Add the missing masking to r2_nz. Enforce PSW validity by replacing the > workaround with an assersion. > > Reported-by: Thomas Weißschuh <[email protected]> > Reported-by: Heiko Carstens <[email protected]> > Link: > https://lore.kernel.org/lkml/[email protected]/ > Cc: [email protected] > Signed-off-by: Ilya Leoshkevich <[email protected]>
Thanks! Tested-by: Thomas Weißschuh <[email protected]> (...)
