Since commit 36a9529e60e ("target/microblaze: Simplify
compute_ldst_addr_type{a,b}"), helper_stackprot() takes
a TCGv_i32 argument.Signed-off-by: Philippe Mathieu-Daudé <[email protected]> Reviewed-by: Anton Johansson <[email protected]> Reviewed-by: Pierrick Bouvier <[email protected]> Reviewed-by: Richard Henderson <[email protected]> Message-Id: <[email protected]> --- target/microblaze/helper.h | 2 +- target/microblaze/op_helper.c | 4 ++-- target/microblaze/translate.c | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/target/microblaze/helper.h b/target/microblaze/helper.h index ef4fad9b91e..01eba592b26 100644 --- a/target/microblaze/helper.h +++ b/target/microblaze/helper.h @@ -20,7 +20,7 @@ DEF_HELPER_FLAGS_3(fcmp_ne, TCG_CALL_NO_WG, i32, env, i32, i32) DEF_HELPER_FLAGS_3(fcmp_ge, TCG_CALL_NO_WG, i32, env, i32, i32) DEF_HELPER_FLAGS_2(pcmpbf, TCG_CALL_NO_RWG_SE, i32, i32, i32) -DEF_HELPER_FLAGS_2(stackprot, TCG_CALL_NO_WG, void, env, tl) +DEF_HELPER_FLAGS_2(stackprot, TCG_CALL_NO_WG, void, env, i32) DEF_HELPER_FLAGS_2(get, TCG_CALL_NO_RWG, i32, i32, i32) DEF_HELPER_FLAGS_3(put, TCG_CALL_NO_RWG, void, i32, i32, i32) diff --git a/target/microblaze/op_helper.c b/target/microblaze/op_helper.c index b8365b3b1d2..df93c4229d6 100644 --- a/target/microblaze/op_helper.c +++ b/target/microblaze/op_helper.c @@ -365,13 +365,13 @@ uint32_t helper_pcmpbf(uint32_t a, uint32_t b) return 0; } -void helper_stackprot(CPUMBState *env, target_ulong addr) +void helper_stackprot(CPUMBState *env, uint32_t addr) { if (addr < env->slr || addr > env->shr) { CPUState *cs = env_cpu(env); qemu_log_mask(CPU_LOG_INT, "Stack protector violation at " - TARGET_FMT_lx " %x %x\n", + "0x%x 0x%x 0x%x\n", addr, env->slr, env->shr); env->ear = addr; diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index b93a40fedbc..994e1d5cef0 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -606,7 +606,7 @@ DO_TYPEBI(xori, false, tcg_gen_xori_i32) static TCGv compute_ldst_addr_typea(DisasContext *dc, int ra, int rb) { - TCGv ret; + TCGv_i32 ret; /* If any of the regs is r0, set t to the value of the other reg. */ if (ra && rb) { @@ -628,7 +628,7 @@ static TCGv compute_ldst_addr_typea(DisasContext *dc, int ra, int rb) static TCGv compute_ldst_addr_typeb(DisasContext *dc, int ra, int imm) { - TCGv ret; + TCGv_i32 ret; /* If any of the regs is r0, set t to the value of the other reg. */ if (ra && imm) { -- 2.51.0
