On Fri, 26 Sept 2025 at 08:08, Luc Michel <[email protected]> wrote: > > v6: > - assert that the SoC user provides an FDT instead of creating a > dummy one. [Edgar] > > v5: > - Patch 36 (xlnx-versal-crl versal2 version): replaced `return NULL' > with a `g_assert_not_reached()' in the versal2_decode_periph_rst > function. [Phil] > - Fixed remaining memory leaks in the Versal SoC by adding a finalize > function. [Peter] > - Patch 39 (cortex-a78ae addition): > - Switched to the last r0p3 revision. > - Removed the CBAR_RO and BACKCOMPAT_CNTFRQ features. > - Fixed the comments referring to TRM sections. [Peter] > > v4: > - Fixed compilation issues and runtime crashes in 3 intermediate > patches. [Edgar] > - Introduced a small hack to keep the GEM FDT node order as it was > before. This is to avoid kernel iface name swapping (eth0 <-> eth1) > in Versal. [Edgar] > > v3: > - Dropped qemu_get_cpu() usage in the machine code. Added an getter on > the SoC interface to retrieve the boot CPU instead. [Phil] > - Cleaned the mp_affinity logic. Drop the mask attribute and assume > it's always 0xff (the Affx fields in MPIDR are 8 bits long). Use the > ARM_AFFx_SHIFT constant instead of hardcoded values in .mp_affinity > description. [Phil] > - Avocado test renaming in patch 41 instead of 47. [Phil] > - Documentation tweak. [Phil] > > v2: > - Addressed formatting/typo issues [Francisco] > - Patch 23: GICv3 first-cpu-idx: addressed the KVM case by bailing > out if not 0 at realize. I chose this path as I don't have a clear > view of what it means to implement that for KVM. It seems to make > sense anyway as this property is meant to be used for modeling of > non-SMP systems. [Peter] > - Patch 39: added a comment to clarify cortex-a78ae != cortex-a78 [Peter] > > Hello, > > This series brings support for the AMD Versal Gen 2 (versal2) SoC in > QEMU. This SoC is the next iteration of the existing Versal SoC.
Applied to target-arm.next, thanks. -- PMM
