From: Luc Michel <[email protected]> Use the bsa.h header for ARM timer and maintainance IRQ indices instead of redefining our owns.
Signed-off-by: Luc Michel <[email protected]> Reviewed-by: Francisco Iglesias <[email protected]> Reviewed-by: Philippe Mathieu-Daudé <[email protected]> Reviewed-by: Edgar E. Iglesias <[email protected]> Tested-by: Philippe Mathieu-Daudé <[email protected]> Message-id: [email protected] Signed-off-by: Peter Maydell <[email protected]> --- include/hw/arm/xlnx-versal.h | 6 ------ hw/arm/xlnx-versal.c | 28 +++++++++++++++++----------- 2 files changed, 17 insertions(+), 17 deletions(-) diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h index 7bdf6dab629..da0260b83de 100644 --- a/include/hw/arm/xlnx-versal.h +++ b/include/hw/arm/xlnx-versal.h @@ -87,12 +87,6 @@ int versal_get_num_sdhci(VersalVersion version); /* Memory-map and IRQ definitions. Copied a subset from * auto-generated files. */ -#define VERSAL_GIC_MAINT_IRQ 9 -#define VERSAL_TIMER_VIRT_IRQ 11 -#define VERSAL_TIMER_S_EL1_IRQ 13 -#define VERSAL_TIMER_NS_EL1_IRQ 14 -#define VERSAL_TIMER_NS_EL2_IRQ 10 - #define VERSAL_CRL_IRQ 10 #define VERSAL_UART0_IRQ_0 18 #define VERSAL_UART1_IRQ_0 19 diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c index 6604e24a9cd..dc388300185 100644 --- a/hw/arm/xlnx-versal.c +++ b/hw/arm/xlnx-versal.c @@ -49,6 +49,7 @@ #include "hw/core/split-irq.h" #include "target/arm/cpu.h" #include "hw/cpu/cluster.h" +#include "hw/arm/bsa.h" #define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72") #define XLNX_VERSAL_RCPU_TYPE ARM_CPU_TYPE_NAME("cortex-r5f") @@ -673,7 +674,8 @@ static DeviceState *versal_create_gic(Versal *s, qemu_fdt_setprop_cell(s->cfg.fdt, node, "phandle", s->phandle.gic); qemu_fdt_setprop_cell(s->cfg.fdt, node, "#interrupt-cells", 3); qemu_fdt_setprop_cells(s->cfg.fdt, node, "interrupts", - GIC_FDT_IRQ_TYPE_PPI, VERSAL_GIC_MAINT_IRQ, + GIC_FDT_IRQ_TYPE_PPI, + INTID_TO_PPI(ARCH_GIC_MAINT_IRQ), GIC_FDT_IRQ_FLAGS_LEVEL_HI); qemu_fdt_setprop(s->cfg.fdt, node, "interrupt-controller", NULL, 0); } @@ -698,10 +700,10 @@ static void connect_gic_to_cpu(const VersalCpuClusterMap *map, * GIC PPI inputs. */ const int timer_irq[] = { - [GTIMER_PHYS] = VERSAL_TIMER_NS_EL1_IRQ, - [GTIMER_VIRT] = VERSAL_TIMER_VIRT_IRQ, - [GTIMER_HYP] = VERSAL_TIMER_NS_EL2_IRQ, - [GTIMER_SEC] = VERSAL_TIMER_S_EL1_IRQ, + [GTIMER_PHYS] = INTID_TO_PPI(ARCH_TIMER_NS_EL1_IRQ), + [GTIMER_VIRT] = INTID_TO_PPI(ARCH_TIMER_VIRT_IRQ), + [GTIMER_HYP] = INTID_TO_PPI(ARCH_TIMER_NS_EL2_IRQ), + [GTIMER_SEC] = INTID_TO_PPI(ARCH_TIMER_S_EL1_IRQ), }; has_gtimer = arm_feature(&ARM_CPU(cpu)->env, ARM_FEATURE_GENERIC_TIMER); @@ -716,9 +718,9 @@ static void connect_gic_to_cpu(const VersalCpuClusterMap *map, if (map->gic.version == 3) { qemu_irq maint_irq; + int maint_idx = ppibase + INTID_TO_PPI(ARCH_GIC_MAINT_IRQ); - maint_irq = qdev_get_gpio_in(gic, - ppibase + VERSAL_GIC_MAINT_IRQ); + maint_irq = qdev_get_gpio_in(gic, maint_idx); qdev_connect_gpio_out_named(cpu, "gicv3-maintenance-interrupt", 0, maint_irq); } @@ -842,13 +844,17 @@ static void versal_create_cpu_cluster(Versal *s, const VersalCpuClusterMap *map) if (map->dtb_expose && has_gtimer) { qemu_fdt_add_subnode(s->cfg.fdt, "/timer"); qemu_fdt_setprop_cells(s->cfg.fdt, "/timer", "interrupts", - GIC_FDT_IRQ_TYPE_PPI, VERSAL_TIMER_S_EL1_IRQ, + GIC_FDT_IRQ_TYPE_PPI, + INTID_TO_PPI(ARCH_TIMER_S_EL1_IRQ), GIC_FDT_IRQ_FLAGS_LEVEL_HI, - GIC_FDT_IRQ_TYPE_PPI, VERSAL_TIMER_NS_EL1_IRQ, + GIC_FDT_IRQ_TYPE_PPI, + INTID_TO_PPI(ARCH_TIMER_NS_EL1_IRQ), GIC_FDT_IRQ_FLAGS_LEVEL_HI, - GIC_FDT_IRQ_TYPE_PPI, VERSAL_TIMER_VIRT_IRQ, + GIC_FDT_IRQ_TYPE_PPI, + INTID_TO_PPI(ARCH_TIMER_VIRT_IRQ), GIC_FDT_IRQ_FLAGS_LEVEL_HI, - GIC_FDT_IRQ_TYPE_PPI, VERSAL_TIMER_NS_EL2_IRQ, + GIC_FDT_IRQ_TYPE_PPI, + INTID_TO_PPI(ARCH_TIMER_NS_EL2_IRQ), GIC_FDT_IRQ_FLAGS_LEVEL_HI); qemu_fdt_setprop(s->cfg.fdt, "/timer", "compatible", compatible, sizeof(compatible)); -- 2.43.0
