On 9/4/25 16:27, Andrew Jones wrote:
The MSI table is not limited to 4k. The only constraint the table has is that its base address must be aligned to its size, ensuring no offsets of the table size will overrun when added to the base address (see "8.5. MSI page tables" of the AIA spec).Fixes: 0c54acb8243d ("hw/riscv: add RISC-V IOMMU base emulation") Signed-off-by: Andrew Jones <[email protected]>
This one looks like a qemu-stable material. Please let me know if it is not. Thanks, /mjt
