The following changes since commit c0e80879c876cbe4cbde43a92403329bcedf2ba0:
Merge tag 'pull-vfio-20251022' of https://github.com/legoater/qemu into staging (2025-10-22 08:01:21 -0500) are available in the Git repository at: https://github.com/bibo-mao/qemu.git tags/pull-loongarch-20251023 for you to fetch changes up to 79ff2eee9a377f654ed0c3533a0874a0e7d6226d: target/loongarch: Add bit A/D checking in TLB entry with PTW supported (2025-10-23 19:43:48 +0800) ---------------------------------------------------------------- pull-loongarch-20251023 queue ---------------------------------------------------------------- Bibo Mao (14): target/loongarch: Use auto method with PTW feature target/loongarch: Add CSR_PWCH write helper function target/loongarch: Add present and write bit with pte entry target/loongarch: Add function sptw_prepare_tlb before adding tlb entry target/loongarch: target/loongarch: Add common function get_tlb_random_index() target/loongarch: Add MMUContext parameter in fill_tlb_entry() target/loongarch: Add debug parameter with loongarch_page_table_walker() target/loongarch: Reserve higher 48 bit PTE attribute with huge page target/loongarch: Move last PTE lookup into page table walker loop target/loongarch: Add field tlb_index to record TLB search info target/loongarch: Add common interface update_tlb_index() target/loongarch: Add basic hardware PTW support target/loongarch: Update matched ptw bit A/D with PTW supported target/loongarch: Add bit A/D checking in TLB entry with PTW supported target/loongarch/cpu-csr.h | 4 + target/loongarch/cpu-mmu.h | 62 ++++++++ target/loongarch/cpu.c | 26 ++++ target/loongarch/cpu.h | 2 + target/loongarch/cpu_helper.c | 146 ++++++++++++++++--- target/loongarch/tcg/csr_helper.c | 15 ++ target/loongarch/tcg/helper.h | 1 + .../tcg/insn_trans/trans_privileged.c.inc | 1 + target/loongarch/tcg/tlb_helper.c | 157 ++++++++++++++++----- 9 files changed, 358 insertions(+), 56 deletions(-)
