On 22/10/25 02:17, Richard Henderson wrote:
For Arm, we need 3 cases: (1) the alignment required when accessing
Normal memory, (2) the alignment required when accessing Device memory,
and (3) the atomicity of the access.
When we added TLB_CHECK_ALIGNED, we assumed that cases 2 and 3 were
identical, and thus used memop_atomicity_bits for TLB_CHECK_ALIGNED.
This is incorrect for multiple reasons, including that the atomicity
of the access is adjusted depending on whether or not we are executing
within a serial context.
For Arm, what is true is that there is an underlying alignment
requirement of the access, and for that access Normal memory
will support unalignement.
Introduce MO_ALIGN_TLB_ONLY to indicate that the alignment
specified in MO_AMASK only applies when the TLB entry has
TLB_CHECK_ALIGNED set; otherwise no alignment required.
Introduce memop_tlb_alignment_bits with an additional bool
argument that specifies whether TLB_CHECK_ALIGNED is set.
All other usage of memop_alignment_bits assumes it is not.
Remove memop_atomicity_bits as unused; it didn't properly
support MO_ATOM_SUBWORD anyway.
Update target/arm finalize_memop_atom to set MO_ALIGN_TLB_ONLY
when strict alignment isn't otherwise required.
Suggested-by: Peter Maydell <[email protected]>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3171
Signed-off-by: Richard Henderson <[email protected]>
---
PS: There are a number of uses of align_mem for AdvSIMD, SVE and SME.
I have not re-familiarized myself with the effects of SCR.A and
Normal/Device memory for those cases. I may well have missed something.
---
include/exec/memop.h | 43 +++++++++++++++------------------
target/arm/tcg/translate.h | 4 +--
accel/tcg/cputlb.c | 13 +---------
target/arm/ptw.c | 2 +-
target/arm/tcg/translate-a64.c | 10 +++-----
target/arm/tcg/translate-neon.c | 2 +-
tcg/tcg.c | 10 +++++---
7 files changed, 35 insertions(+), 49 deletions(-)
To the best of my knowledge,
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
