2025-11-24T10:37:31-08:00, Drew Fustini <[email protected]>:
> On Mon, Nov 24, 2025 at 06:02:37PM +0100, Radim Krčmář wrote:
>> 2025-11-21T11:50:50-08:00, Drew Fustini <[email protected]>:
>> > On Thu, Nov 20, 2025 at 08:25:44PM +0100, Radim Krčmář wrote:
>> >> 2025-11-19T16:42:19-08:00, Drew Fustini <[email protected]>:
>> >> > +static void riscv_cbqri_cc_realize(DeviceState *dev, Error **errp)
>> >> > +{
>> >> > +    RiscvCbqriCapacityState *cc = RISCV_CBQRI_CC(dev);
>> >> > +
>> >> > +    if (!cc->mmio_base) {
>> >> > +        error_setg(errp, "mmio_base property not set");
>> >> > +        return;
>> >> > +    }
>> >> > +
>> >> > +    assert(cc->mon_counters == NULL);
>> >> > +    cc->mon_counters = g_new0(MonitorCounter, cc->nb_mcids);
>> >> > +
>> >> > +    assert(cc->alloc_blockmasks == NULL);
>> >> > +    uint64_t *end = get_blockmask_location(cc, cc->nb_rcids, 0);
>> >> > +    unsigned int blockmasks_size = end - cc->alloc_blockmasks;
>> >> > +    cc->alloc_blockmasks = g_new0(uint64_t, blockmasks_size);
>> >> > +
>> >> > +    memory_region_init_io(&cc->mmio, OBJECT(dev), &riscv_cbqri_cc_ops,
>> >> > +                          cc, TYPE_RISCV_CBQRI_CC".mmio", 4 * 1024);
>> >> 
>> >> Shouldn't the region size take cc->ncblks into account?
>> >> (A bitmask for 2^16 ids is 8kB.)
>> >
>> > cc_block_mask field is BMW / 8. In the case of NCBLKS of 12 and NCBLKS
>> > of 16, both end up with a BMW of 64 which would be 8 bytes. I think the
>> > the only reason the allocation is 4KB is that is meant to be aligned to
>> > the page size. Otherwise, the capacity controller register layout is
>> > pretty small.
>> 
>> I understood NCBLKS as the amount of bits in the capacity bitmask, and
>> NCBLKS in encoded in a 16 bit field, which means up to 65536 bits.
>> Is there a lower limit?
>
> Ah, yes, thank you for correcting me. NCBLKS can be 2^16 therefore BMW
> can be 8 KB: 
>
> x = 65536
> x += 63 => 65599
> x /= 64 => 1024
> x *= 64 => BMW is 65536 bits
> cc_block_mask = BMW/8 = 8192 bytes
>
> This would yield capacity register layout:
>
> cc_capabilities       8
> cc_mon_ctl    8
> cc_mon_ctr_val        8
> cc_alloc_ctl  8
> cc_block_mask 8192
> cc_cunits     8
>
> Thus I think the mmio size would need to be: (BMW/8) + 40
>
> In the max NCBLKS case, that would be 8,232 bytes. I am wondering if
> that a problem as it would not be aligned on a 4 KB page boundary. Do
> you think that would be a problem?

memory_region_init_io will handle it, and I think it is actually better
to specify the exact size.

Thanks.

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