On 3/12/25 17:14, Richard Henderson wrote:
Since d182123974c4, the number of bits in a MemOpIdx tops out at 17. which won't fit in the TCI rrm format, thus an assertion failure. Introduce new opcodes that take the MemOpIdx from a register, as we already do for qemu_ld2 and qemu_st2.Fixes: d182123974c4 ("include/exec/memopidx: Adjust for 32 mmu indexes") Tested-by: Alex Bennée <[email protected]> Signed-off-by: Richard Henderson <[email protected]> --- tcg/tci.c | 19 +++++++++++++++++++ tcg/tci/tcg-target-opc.h.inc | 2 ++ tcg/tci/tcg-target.c.inc | 14 ++++++++++++-- 3 files changed, 33 insertions(+), 2 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
