Thanks to Gustavo Romero for reviews. Changes in v5: - Patch 2: - TLB flush when A2/FNG0/FNG1 could be written to. - Patch 4: - SPDX License identifier moved to first line.
Jim MacArthur (4): target/arm: Enable ID_AA64MMFR4_EL1 register target/arm: Allow writes to FNG1, FNG0, A2 target/arm/tcg/cpu64.c: Enable ASID2 for cpu_max tests: Add test for ASID2 and write/read of feature bits docs/system/arm/emulation.rst | 1 + target/arm/cpu-features.h | 7 +++ target/arm/cpu-sysregs.h.inc | 1 + target/arm/helper.c | 22 ++++++++- target/arm/tcg/cpu64.c | 4 ++ tests/tcg/aarch64/system/asid2.c | 76 ++++++++++++++++++++++++++++++++ 6 files changed, 109 insertions(+), 2 deletions(-) create mode 100644 tests/tcg/aarch64/system/asid2.c -- 2.43.0
