Since TARGET_PHYS_ADDR_SPACE_BITS is now fixed to 64 bits for all targets we can remove range checks on cpu->phys_bits and TCG_PHYS_ADDR_BITS.
Signed-off-by: Anton Johansson <[email protected]> --- target/i386/tcg/helper-tcg.h | 2 -- target/i386/cpu.c | 9 +++------ target/i386/kvm/kvm.c | 3 +-- 3 files changed, 4 insertions(+), 10 deletions(-) diff --git a/target/i386/tcg/helper-tcg.h b/target/i386/tcg/helper-tcg.h index e41cbda407..f4b2ff740d 100644 --- a/target/i386/tcg/helper-tcg.h +++ b/target/i386/tcg/helper-tcg.h @@ -31,8 +31,6 @@ # define TCG_PHYS_ADDR_BITS 36 #endif -QEMU_BUILD_BUG_ON(TCG_PHYS_ADDR_BITS > TARGET_PHYS_ADDR_SPACE_BITS); - /** * x86_cpu_do_interrupt: * @cpu: vCPU the interrupt is to be handled by. diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 6417775786..0eeceed7cd 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -9435,12 +9435,9 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) * accel-specific code in cpu_exec_realizefn. */ if (env->features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) { - if (cpu->phys_bits && - (cpu->phys_bits > TARGET_PHYS_ADDR_SPACE_BITS || - cpu->phys_bits < 32)) { - error_setg(errp, "phys-bits should be between 32 and %u " - " (but is %u)", - TARGET_PHYS_ADDR_SPACE_BITS, cpu->phys_bits); + if (cpu->phys_bits && cpu->phys_bits < 32) { + error_setg(errp, "phys-bits should be at least 32" + " (but is %u)", cpu->phys_bits); return; } /* diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 60c7981138..edfff01d64 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -4681,8 +4681,7 @@ static int kvm_get_msrs(X86CPU *cpu) */ if (cpu->fill_mtrr_mask) { - QEMU_BUILD_BUG_ON(TARGET_PHYS_ADDR_SPACE_BITS > 52); - assert(cpu->phys_bits <= TARGET_PHYS_ADDR_SPACE_BITS); + assert(cpu->phys_bits <= 52); mtrr_top_bits = MAKE_64BIT_MASK(cpu->phys_bits, 52 - cpu->phys_bits); } else { mtrr_top_bits = 0; -- 2.51.0
