> On 11 Dec 2025, at 16:04, Richard Henderson <[email protected]> > wrote: > > WARNING: This email originated from outside of Qualcomm. Please be wary of > any links or attachments, and do not enable macros. > >> --- a/include/hw/core/cpu.h >> +++ b/include/hw/core/cpu.h >> @@ -269,6 +269,8 @@ struct CPUTLBEntryFull { >> bool guarded; >> } arm; >> } extra; >> + >> + AddressSpace *as; >> }; > ... >> -MemoryRegionSection *iotlb_to_section(CPUState *cpu, >> + >> +MemoryRegionSection *iotlb_to_section(AddressSpace *as, >> hwaddr index, MemTxAttrs attrs) >> { >> - int asidx = cpu_asidx_from_attrs(cpu, attrs); >> - CPUAddressSpace *cpuas = &cpu->cpu_ases[asidx]; >> - AddressSpaceDispatch *d = address_space_to_dispatch(cpuas->as); >> + assert(as); >> + AddressSpaceDispatch *d = address_space_to_dispatch(as); >> int section_index = index & ~TARGET_PAGE_MASK; > > Adding the as to CPUTLBEntryFull is unnecessary because > > (1) Each CPUTLB, and thus each CPUTLBEntryFull, is private to the cpu. > (2) Each CPUTLBEntryFull contains the MemTxAttrs for the access. > > Thus the AddressSpace is purely a function of (cpu, attrs).
The issue is, it would seem, it is also a function of the lookup provided by an IOMMU access - that kindly provides an address space independent of any CPU. For now, the information thus provided would seem to be discarded, those subsequent accesses, using, as you suggest, an address space that is a function of the cpu and the attributes, arrives at the wrong pace. An option, I guess, may be to provide the address space as an attribute… though maintaining the link with the page that has been thus evaluated via the IOMMU translation maybe, it would seem, challenging. Cheers Mark. > > We can have a conversation about where this lookup happens, and whether or > not particular > functions should be passed a CPUState, but adding AddressSpace to full tlb is > redundant. > > > r~
