On 12/12/25 10:35, Richard Henderson wrote:
On 11/26/25 14:21, Philippe Mathieu-Daudé wrote:
HELPER_LD_ATOMIC() now has a MemOpIdx, from which we
can extract the MemOp size. Use it to check the address
alignment.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
---
target/mips/tcg/ldst_helper.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
True, but adding MO_ALIGN to the MemOpIdx (and thus to the MemOp) might be more useful,
allowing you to remove this explicit check.
Follow-up: You'd also reorg the function such that
env->llval = cpu_load(env, arg, oi, GETPC()); \
env->CP0_LLAddr = cpu_mips_translate_address(env, arg, MMU_DATA_LOAD, \
GETPC()); \
env->lladdr = arg; \
return env->llval; \
so that lladdr and CP0_LLAddr do not get assigned when there is an alignment
fault.
Also, the cpu_load will have either faulted, or pulled in the translation to CPUTLB. You
don't need the full PTW of cpu_mips_translate_address. Using probe_access_full will
quickly grab the CPUTLBEntryFull, from which phys_addr is your required value.
r~
