translator_lduw() is defined in "exec/translator.h" as:
192 static inline uint16_t
193 translator_lduw(CPUArchState *env, DisasContextBase *db, vaddr pc)
194 {
195 return translator_lduw_end(env, db, pc, MO_TE);
196 }
Directly use the inlined form, expanding MO_TE -> MO_LE
since we only build the TriCore target as little-endian.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
---
target/tricore/translate.c | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/target/tricore/translate.c b/target/tricore/translate.c
index fbe05a93a8a..18d8726af6d 100644
--- a/target/tricore/translate.c
+++ b/target/tricore/translate.c
@@ -8422,7 +8422,8 @@ static bool insn_crosses_page(DisasContext *ctx,
CPUTriCoreState *env)
* 4 bytes from the page boundary, so we cross the page if the first
* 16 bits indicate that this is a 32 bit insn.
*/
- uint16_t insn = translator_lduw(env, &ctx->base, ctx->base.pc_next);
+ uint16_t insn = translator_lduw_end(env, &ctx->base, ctx->base.pc_next,
+ MO_LE);
return !tricore_insn_is_16bit(insn);
}
@@ -8435,15 +8436,15 @@ static void tricore_tr_translate_insn(DisasContextBase
*dcbase, CPUState *cpu)
uint16_t insn_lo;
bool is_16bit;
- insn_lo = translator_lduw(env, &ctx->base, ctx->base.pc_next);
+ insn_lo = translator_lduw_end(env, &ctx->base, ctx->base.pc_next, MO_LE);
is_16bit = tricore_insn_is_16bit(insn_lo);
if (is_16bit) {
ctx->opcode = insn_lo;
ctx->pc_succ_insn = ctx->base.pc_next + 2;
decode_16Bit_opc(ctx);
} else {
- uint32_t insn_hi = translator_lduw(env, &ctx->base,
- ctx->base.pc_next + 2);
+ uint32_t insn_hi = translator_lduw_end(env, &ctx->base,
+ ctx->base.pc_next + 2, MO_LE);
ctx->opcode = insn_hi << 16 | insn_lo;
ctx->pc_succ_insn = ctx->base.pc_next + 4;
decode_32Bit_opc(ctx);
--
2.52.0
