On 12/22/2025 12:35 AM, Philippe Mathieu-Daudé wrote:
On 22/12/25 09:17, Cédric Le Goater wrote:
Hello Farhan,
On 12/19/25 18:30, Farhan Ali wrote:
On 12/19/2025 8:30 AM, Cédric Le Goater wrote:
On 12/19/25 17:21, Philippe Mathieu-Daudé wrote:
On 19/12/25 15:51, Cédric Le Goater wrote:
Hello,
On 12/17/25 19:42, Farhan Ali wrote:
The VFIO pread/pwrite functions use little-endian data format.
When enabling the Bus Master bit, the value must be correctly
converted
from the CPU's native endianess to little-endian format.
How did you find the issue ?
I presumed using VFIO on s390x hosts...
yes. I have been using a nvme drive for over 2y in an s390x VM and
never
saw any issue.
C.
Hi Cedric,
I have recently been experimenting with QEMU NVMe userspace driver
and PCI instructions from userspace [1]. On some of our test systems
I noticed the driver being hung. After some investigation we
realized it was due to this issue.
Do you think you could provide a test case for it ?
@Cedric,
Just wanted to understand what you had in mind here? The test case would
use VFIO and would need an NVMe device, looking through QEMU testcases I
couldn't find an example of using VFIO. If there are examples or other
frameworks that is used to test this could you point me to them?
Also, I think the LE conversion should be done in routines
qemu_vfio_pci_read_config() and qemu_vfio_pci_write_config().
These config routines take a void buffer, so have no clue of endianness
size.
Yup, exactly.
Maybe we want intermediary qemu_vfio_pci_ld16_config() and
qemu_vfio_pci_st16_config() helpers?
I did think of adding in additional helper functions. But
since qemu_vfio_pci_read_config()/qemu_vfio_pci_write_config() is only
called in this one place, wasn't sure if it made sense in adding them.
Another approach I thought of was limiting reads/writes to 32 bit
similar to vfio_pci_write_config()/vfio_pci_read_config() does today.
Can we do this here as well?
Thanks
Farhan
