On 25/12/18 02:03PM, Caleb Schlossin wrote: > OCCFLG are scratch registers that can be shared with OCC firmware. > Log reads and writes to the registers as a reminder when we run > into more OCC code. > > Add RW, WO_CLEAR and WO_OR SCOM Type enums in pnv_occ.c > > Signed-off-by: Chalapathi V <[email protected]> > Signed-off-by: Caleb Schlossin <[email protected]> > --- > hw/ppc/pnv_occ.c | 55 +++++++++++++++++++++++++++++++++++++--- > include/hw/ppc/pnv_occ.h | 4 +++ > 2 files changed, 56 insertions(+), 3 deletions(-) > > diff --git a/hw/ppc/pnv_occ.c b/hw/ppc/pnv_occ.c > index 24b789c191..e605ae0fbc 100644 > --- a/hw/ppc/pnv_occ.c > +++ b/hw/ppc/pnv_occ.c > @@ -195,6 +195,49 @@ static const TypeInfo pnv_occ_power8_type_info = { > #define P9_OCB_OCI_OCCMISC_CLEAR 0x6081 > #define P9_OCB_OCI_OCCMISC_OR 0x6082 > > +/* OCC scratch registers for flag setting */ > +#define P9_OCCFLG0 0x60ac > +#define P9_OCCFLG7_OR 0x60c3 > + > +enum ScomType { > + SCOM_TYPE_RW = 0, > + SCOM_TYPE_WO_CLEAR = 1, > + SCOM_TYPE_WO_OR = 2, > +}; > + > +static void rw_occ_flag_regs(PnvOCC *occ, uint32_t offset, bool read, > + uint64_t *val) > +{ > + int flag_num; > + int flag_type; > + > + /* > + * Each OCCFLG register has SCOM0 - RW, SCOM1 - WO_CLEAR, SCOM2 - WO_OR > + * hence devide by 3 to get flag index and mod 3 to get SCOM type.
nitpick: s/devide/divide > + */ > + flag_num = (offset - P9_OCCFLG0) / 3; > + flag_type = (offset - P9_OCCFLG0) % 3; flag_num can be negative if offset is invalid, but since the function is static, the current usage ensure that never happens. So, it's okay with me. Reviewed-by: Aditya Gupta <[email protected]> Thanks, - Aditya G
