> On 11. Mar 2026, at 17:54, Alex Bennée <[email protected]> wrote:
>
> "Anirudh Rayabharam (Microsoft)" <[email protected]> writes:
>
>> This series adds ARM64 guest support to the MSHV (Microsoft Hypervisor)
>> accelerator, enabling QEMU to run aarch64 VMs on Microsoft's hypervisor
>> using the mshv Linux kernel module.
>
> Does GitLab (or anything we plug into it) support runners on Arm64 with
> HyperV and a Linux Dom0?
>
> I looks like we would need a dedicated runner to defend the
> functionality on CI.
The MSHV license doesn’t allow for any use outside of Azure Kubernetes Service,
despite MSHV (for x86) being public.
And Dom0 is technically not required as there’s L1VH, but that’s even less
documented to
the outside and not set up for more local use - but hopefully will make its way
to Windows
client at some point :/
>>
>> The first few patches refactor the existing x86 MSHV code to separate
>> arch-specific pieces from common infrastructure: moving MSR handling to
>> target/i386, extracting shared register hypercall helpers, provisioning
>> host CPU features, and introducing arch-specific init hooks.
>>
>> The remaining patches add the ARM64 backend:
>> - vCPU state get/set using hypervisor register hypercalls
>> - -cpu host support by querying ID registers from the hypervisor
>> - vCPU run loop with MMIO emulation via ESR_EL2 syndrome decoding
>> - In-kernel vGICv3 backed by HVCALL_ASSERT_VIRTUAL_INTERRUPT
>> - Interrupt control structure adjustments for arm64
>>
>> With this series, a standard aarch64 virt machine can be launched with:
>> qemu-system-aarch64 -accel mshv -cpu host -M virt ...
>>
>> Caveats:
>> - Currently only direct kernel is supported. We're still debugging edk2
>> firmware boot.
>> - Live migration is not yet supported.
>>
>> ---
>> Aastha Rawat (7):
>> accel/mshv: move msr.c to target/i386
>> accel/mshv: extract common CPU register helpers
>> meson, target/arm/mshv: Enable arm64 build & add initial MSHV support
>> target/arm/mshv: implement vcpu state operations for ARM64
>> target/arm/mshv: implement -cpu host for MSHV
>> accel/mshv: Add access_vp_regs synthetic proc features
>> target/arm: cpu: Mark MSHV supporting PSCI 1.3
>>
>> Anirudh Rayabharam (Microsoft) (6):
>> accel/mshv: provision guests with the same features as host
>> accel/mshv: add arch-specific accelerator init hook
>> target/arm/mshv: add vCPU run loop
>> include/hw/hyperv: adjust hv_interrupt_control structure for arm64
>> hw/intc,target/arm/mshv: add MSHV vGICv3 implementation
>> MAINTAINERS: updates for MSHV arm64 code
>>
>> Magnus Kulke (1):
>> accel/mshv: implement cpu_thread_is_idle() hook
>>
>> MAINTAINERS | 8 +
>> accel/mshv/irq.c | 2 +
>> accel/mshv/meson.build | 4 +-
>> accel/mshv/mshv-all.c | 73 +++-
>> accel/mshv/mshv-cpu-common.c | 151 +++++++++
>> hw/arm/virt.c | 11 +-
>> hw/intc/arm_gicv3_common.c | 3 +
>> hw/intc/arm_gicv3_mshv.c | 180 ++++++++++
>> hw/intc/meson.build | 1 +
>> include/hw/hyperv/hvgdk_mini.h | 130 ++++++++
>> include/hw/hyperv/hvhdk.h | 97 +++++-
>> include/hw/hyperv/hvhdk_mini.h | 6 +
>> include/hw/intc/arm_gicv3_common.h | 1 +
>> include/system/hw_accel.h | 3 +-
>> include/system/mshv.h | 2 +
>> include/system/mshv_int.h | 5 +
>> meson.build | 7 +-
>> target/arm/cpu.c | 7 +-
>> target/arm/cpu64.c | 24 +-
>> target/arm/meson.build | 1 +
>> target/arm/mshv/meson.build | 7 +
>> target/arm/mshv/mshv-all.c | 665
>> +++++++++++++++++++++++++++++++++++++
>> target/arm/mshv_arm.h | 18 +
>> target/i386/mshv/meson.build | 2 +
>> target/i386/mshv/mshv-all.c | 85 +++++
>> target/i386/mshv/mshv-cpu.c | 170 +---------
>> {accel => target/i386}/mshv/msr.c | 0
>> 27 files changed, 1465 insertions(+), 198 deletions(-)
>> ---
>> base-commit: 1fd5ff9d76d23ab23a68419cbc76d5ee33e8b455
>> change-id: 20260311-mshv_accel_arm64_supp-e86b0082aee4
>>
>> Best regards,
>
> --
> Alex Bennée
> Virtualisation Tech Lead @ Linaro
>
