Re: [PATCH v2] target/riscv/pmp: Fix integer overflow in TOR and NA4 address computation

[Alistair Francis]

On Mon, May 11, 2026 at 7:53 PM Zishun Yi <vu...@iscas.ac.cn> wrote:
>
> According to the RISC-V Privileged Manual: "The Sv32 page-based
> virtual-memory scheme described in sv32 supports 34-bit physical
> addresses for RV32, so the PMP scheme must support addresses wider than
> XLEN for RV32."
>
> However, the current QEMU implementation uses `target_ulong` (which
> resolves to `uint32_t` on RV32) for PMP address variables.  When
> shifting these addresses left (e.g., `this_addr << 2`), an integer
> overflow occurs, truncating the high bits of the 34-bit physical
> address.
>
> Fix this issue by casting the `target_ulong` variables to `hwaddr`
> before performing the left shift operation.

It's probably a better idea to just use `hwaddr` for `this_addr` and
`prev_addr` instead

Alistair