The UART uses baudbase = 115200, corresponding to an input clock of 1843200 Hz. Update the FDT clock-frequency property to match the model.
Signed-off-by: pillow <[email protected]> --- hw/loongarch/virt-fdt-build.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/loongarch/virt-fdt-build.c b/hw/loongarch/virt-fdt-build.c index c6f5d02..7be71e2 100644 --- a/hw/loongarch/virt-fdt-build.c +++ b/hw/loongarch/virt-fdt-build.c @@ -474,7 +474,7 @@ static void fdt_add_uart_node(LoongArchVirtMachineState *lvms, qemu_fdt_add_subnode(ms->fdt, nodename); qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "ns16550a"); qemu_fdt_setprop_cells(ms->fdt, nodename, "reg", 0x0, base, 0x0, size); - qemu_fdt_setprop_cell(ms->fdt, nodename, "clock-frequency", 100000000); + qemu_fdt_setprop_cell(ms->fdt, nodename, "clock-frequency", 1843200); if (chosen) { qemu_fdt_setprop_string(ms->fdt, "/chosen", "stdout-path", nodename); } -- 2.56.0
